Datasheet

Rev. 2.00 Aug. 20, 2008 Page 1193 of 1198
REJ09B0403-0200
Interrupt control modes ............................ 93
Interrupt controller.................................... 79
Interrupt exception handling..................... 76
Interrupt exception handling sequence ... 100
Interrupt exception handling
vector table ............................................... 90
Interrupt mask bit...................................... 36
interrupt mask level .................................. 35
Interrupt-in transfer................................. 879
Interval timer mode ................................ 424
IRQ15 to IRQ0 interrupts ......................... 88
L
LPC interface (LPC)............................... 665
LPC interface clock start request............ 749
LSI internal states in each mode........... 1064
M
Magic Packet detection........................... 785
Master receive operation......................... 625
Master transmit operation ....................... 621
Medium-speed mode ............................ 1065
MII frame timing .................................... 780
Mode comparison ................................... 918
Mode transition diagram....................... 1063
Module stop mode ................................ 1070
Multi-buffer frame transmit/
receive processing................................... 829
Multiply-accumulate register (MAC) ....... 37
Multiprocessor communication
function................................................... 462
N
NMI interrupt............................................ 88
Normal mode .................................. 178, 186
Number of DTC execution states ........... 184
O
OCIA....................................................... 386
OCIB....................................................... 386
On-board programming .......................... 945
On-board programming mode................. 915
Operating modes .......................................63
Operation by IPG setting ........................786
Operation field .......................................... 52
Output compare.......................................383
Overflow ................................................. 422
Overrun error ..........................................458
OVI0 ....................................................... 409
OVI1 ....................................................... 409
OVIX ...................................................... 409
OVIY ...................................................... 409
P
Parity error .............................................. 458
PDM...................................................... 1055
Pin arrangement .......................................... 4
Pin functions ............................................. 14
Procedure program..................................970
Program counter (PC) ............................... 35
Programmer mode................................... 985
Programming/erasing interface
register ....................................................926
Protection................................................ 980
R
RAM ............................................. 913, 1117
Receive descriptor 0 (RD0).....................821
Receive descriptor 1 (RD1).....................824
Receive descriptor 2 (RD2).....................824
Register field.............................................52
Registers
ABRKCR.............................................. 82
ADCR .................................................899
ADCSR ............................................... 897