Datasheet

Rev. 2.00 Aug. 20, 2008 Page xiv of xlviii
8.3.2 Port Control Register 0 (PTCNT0)....................................................................... 358
Section 9 14-Bit PWM Timer (PWMX) ...........................................................359
9.1 Features.............................................................................................................................. 359
9.2 Input/Output Pins............................................................................................................... 360
9.3 Register Descriptions ......................................................................................................... 360
9.3.1 PWMX (D/A) Counter (DACNT) ........................................................................ 361
9.3.2 PWMX (D/A) Data Registers A and B (DADRA and DADRB).......................... 362
9.3.3 PWMX (D/A) Control Register (DACR) ............................................................. 364
9.3.4 Peripheral Clock Select Register (PCSR) ............................................................. 365
9.4 Bus Master Interface.......................................................................................................... 366
9.5 Operation ........................................................................................................................... 367
Section 10 16-Bit Free-Running Timer (FRT)..................................................375
10.1 Features.............................................................................................................................. 375
10.2 Register Descriptions......................................................................................................... 377
10.2.1 Free-Running Counter (FRC) ............................................................................... 377
10.2.2 Output Compare Registers A and B (OCRA and OCRB) .................................... 377
10.2.3 Output Compare Registers AR and AF (OCRAR and OCRAF) .......................... 378
10.2.4 Timer Interrupt Enable Register (TIER)............................................................... 379
10.2.5 Timer Control/Status Register (TCSR)................................................................. 380
10.2.6 Timer Control Register (TCR).............................................................................. 381
10.2.7 Timer Output Compare Control Register (TOCR) ............................................... 382
10.3 Operation Timing............................................................................................................... 383
10.3.1 FRC Increment Timing......................................................................................... 383
10.3.2 Output Compare Output Timing........................................................................... 383
10.3.3 FRC Clear Timing ................................................................................................ 384
10.3.4 Timing of Output Compare Flag (OCF) Setting................................................... 384
10.3.5 Timing of FRC Overflow Flag (OVF) Setting...................................................... 385
10.3.6 Automatic Addition Timing.................................................................................. 386
10.4 Interrupt Sources................................................................................................................ 386
10.5 Usage Notes ....................................................................................................................... 387
10.5.1 Conflict between FRC Write and Clear ................................................................ 387
10.5.2 Conflict between FRC Write and Increment......................................................... 388
10.5.3 Conflict between OCR Write and Compare-Match .............................................. 389
10.5.4 Switching of Internal Clock and FRC Operation.................................................. 390
Section 11 8-Bit Timer (TMR).......................................................................... 393
11.1 Features.............................................................................................................................. 393
11.2 Register Descriptions......................................................................................................... 396