Datasheet

Section 6 Bus Controller (BSC)
Rev. 2.00 Aug. 20, 2008 Page 129 of 1198
REJ09B0403-0200
6.5.2 Valid Strobes
Table 6.13 shows the data buses used and valid strobes for each access space.
In a read, the RD signal is valid for both the upper and lower halves of the data bus. In a write, the
HWR signal is valid for the upper half of the data bus, and the LWR signal for the lower half.
Table 6.13 Data Buses Used and Valid Strobes
Area
Access
Size
Read/
Write
Address
Valid
Strobe
Upper Data Bus
(D15 to D8/
AD15 to AD8)
Lower Data
Bus (D7 to
D0/AD7 to
AD0)
Byte Read  RD Valid Ports or others
8-bit access
space
Write  HWR
Byte Read  RD Ports or others Valid
8-bit access
space
(in address-
data multiplex
extended
mode)
Write  HWR
Byte Read Even RD Valid Invalid
Odd Invalid Valid
Write Even HWR Valid Undefined
Odd LWR Undefined Valid
Word Read  RD Valid Valid
16-bit access
space
Write  HWR, LWR
[Legend]
Undefined: Undefined data is output.
Invalid: Input state with the input value ignored.
Ports or others: Used as ports or I/O pins for on-chip peripheral modules, and are not used as the
data bus.