Datasheet

Rev. 2.00 Aug. 20, 2008 Page xxiii of xlviii
21.3 Operation ........................................................................................................................... 815
21.3.1 Descriptor List and Data Buffers .......................................................................... 815
21.3.2 Transmission......................................................................................................... 825
21.3.3 Reception .............................................................................................................. 827
21.3.4 Multi-Buffer Frame Transmit/Receive Processing ............................................... 829
Section 22 USB Function Module (USB)..........................................................831
22.1 Features.............................................................................................................................. 831
22.2 Input/Output Pins............................................................................................................... 832
22.3 Register Descriptions ......................................................................................................... 833
22.3.1 Interrupt Flag Register 0 (IFR0) ........................................................................... 834
22.3.2 Interrupt Flag Register 1 (IFR1) ........................................................................... 836
22.3.3 Interrupt Flag Register 2 (IFR2) ........................................................................... 837
22.3.4 Interrupt Select Register 0 (ISR0)......................................................................... 838
22.3.5 Interrupt Select Register 1 (ISR1)......................................................................... 839
22.3.6 Interrupt Select Register 2 (ISR2)......................................................................... 839
22.3.7 Interrupt Enable Register 0 (IER0) ....................................................................... 840
22.3.8 Interrupt Enable Register 1 (IER1) ....................................................................... 840
22.3.9 Interrupt Enable Register 2 (IER2) ....................................................................... 841
22.3.10 EP0i Data Register (EPDR0i)............................................................................... 841
22.3.11 EP0o Data Register (EPDR0o) ............................................................................. 842
22.3.12 EP0s Data Register (EPDR0s) .............................................................................. 842
22.3.13 EP1 Data Register (EPDR1) ................................................................................. 843
22.3.14 EP2 Data Register (EPDR2) ................................................................................. 843
22.3.15 EP3 Data Register (EPDR3) ................................................................................. 843
22.3.16 EP0o Receive Data Size Register (EPSZ0o) ........................................................ 844
22.3.17 EP1 Receive Data Size Register (EPSZ1) ............................................................ 844
22.3.18 Trigger Register (TRG)......................................................................................... 844
22.3.19 Data Status Register (DASTS).............................................................................. 846
22.3.20 FIFO Clear Register (FCLR) ................................................................................ 847
22.3.21 DTC Transfer Setting Register (DMA) ................................................................ 848
22.3.22 Endpoint Stall Register (EPSTL).......................................................................... 851
22.3.23 Configuration Value Register (CVR) ................................................................... 852
22.3.24 Control Register (CTLR) ...................................................................................... 852
22.3.25 Endpoint Information Register (EPIR) ................................................................. 854
22.3.26 Transceiver Test Register 0 (TRNTREG0)........................................................... 858
22.3.27 Transceiver Test Register 1 (TRNTREG1)........................................................... 859
22.4 Interrupt Sources................................................................................................................ 861
22.5 Operation ........................................................................................................................... 863
22.5.1 Operation at Cable Connection............................................................................. 863