Datasheet

Section 8 I/O Ports
Rev. 2.00 Aug. 20, 2008 Page 200 of 1198
REJ09B0403-0200
(b) Single-Chip Mode (EXPE = 0)
• P27/DTR
The pin function is switched as shown below according to the combination of the SCIFE bit in
HICR5 of the LPC, the SCIFOE1 and SCIFOE0 bits in SCIFCR of the SCIF, and the P27DDR
bit.
SCIFE 0 1
SCIFOE1,
SCIFOE0
Other than 10 10 X1 X0
P27DDR 0 1 X 0 1 X
Pin function P27 input pin P27 output
pin
DTR output
pin
P27 input pin P27 output
pin
DTR output
pin
[Legend] X: Don't care.
• P26/DSR, P25/RI, P24/DCD
The pin function is switched as shown below according to the P2nDDR bit.
P2nDDR 0 1
Pin function P2n input pin
DSR/RI/DCD input pin
P2n output pin
[Legend] n = 6 to 4
• P23 to P20
The pin function is switched as shown below according to the P2nDDR bit.
P2nDDR 0 1
Pin function P2n input pin P2n output pin
[Legend] n = 3 to 0