Datasheet

Section 8 I/O Ports
Rev. 2.00 Aug. 20, 2008 Page 220 of 1198
REJ09B0403-0200
• P51/IRQ9/RxDF
The pin function is switched as shown below according to the combination of the
enable/disable setting of the SCIF and the P51DDR bit.
When the ISS9 bit in ISSR16 is cleared to 0 and the IRQ9E bit in IER16 of the interrupt
controller is set to 1, this pin can be used as the IRQ9 input pin. To use as the IRQ9 input pin,
clear the P51DDR bit to 0.
SCIF Disabled Enabled
P51DDR 0 1 X
P51 input pin Pin function
IRQ9 input pin
P51 output pin RxDF input pin
[Legend] X: Don't care.
• P50/IRQ8/TxDF
The pin function is switched as shown below according to the combination of the
enable/disable setting of the SCIF and the P50DDR bit.
When the ISS8 bit in ISSR16 is cleared to 0 and the IRQ8E bit in IER16 of the interrupt
controller is set to 1, this pin can be used as the IRQ8 input pin. To use as the IRQ8 input pin,
clear the P50DDR bit to 0.
SCIF Disabled Enabled
P50DDR 0 1 X
P50 input pin Pin function
IRQ8 input pin
P50 output pin TxDF output pin
[Legend] X: Don't care.