Datasheet

Section 8 I/O Ports
Rev. 2.00 Aug. 20, 2008 Page 224 of 1198
REJ09B0403-0200
• P67/ExIRQ8/SSCK
The pin function is switched as shown below according to the SCKS bit in SSCRH of the SSU
and the P67DDR bit. When the ISS8 bit in ISSR16 is set to 1, this pin can be used as the
ExIRQ8 input pin. To use as the ExIRQ8 input pin, clear the P67DDR bit to 0.
SCKS 0 1
P67DDR 0 1 X
P67 input pin Pin function
ExIRQ8 input pin
P67 output pin SSCK I/O pin
[Legend] X: Don't care.
• P66/ExIRQ9/SCS
The pin function is switched as shown below according to the CSS1 and CSS0 bits in SSCRH
of the SSU and the P66DDR bit. When the ISS9 bit in ISSR16 is set to 1, this pin can be used
as the ExIRQ9 input pin. To use as the ExIRQ9 input pin, clear the P66DDR bit to 0.
CSS1, CSS0 00 01 or 1X
P66DDR 0 1 X
P66 input pin Pin function
ExIRQ9 input pin
P66 output pin SCS I/O pin
[Legend] X: Don't care.
• P65/ExIRQ10/RTS
The pin function is switched as shown below according to the combination of the
enable/disable setting of the SCIF and the P65DDR bit.
When the ISS10 bit in ISSR16 is set to 1, this pin can be used as the ExIRQ10 input pin. To
use as the ExIRQ10 input pin, clear the P65DDR bit to 0.
SCIF Disabled Enabled
P65DDR 0 1 X
P65 input pin Pin function
IRQ10 input pin
P65 output pin RTS output pin
[Legend] X: Don't care.