Datasheet

Section 8 I/O Ports

Rev. 2.00 Aug. 20, 2008 Page 237 of 1198

REJ09B0403-0200

(2) Port 9 Data Register (P9DR)

P9DR stores output data for the port 9 pins.

Bit Bit Name Initial Value R/W Description

7 P97DR 0 R/W

6 P96DR 0 R/W

5 P95DR 0 R/W

4 P94DR 0 R/W

3 P93DR 0 R/W

2 P92DR 0 R/W

1 P91DR 0 R/W

0 P90DR 0 R/W

P9DR stores output data for the port 9 pins that are

used as the general output port.

If this register is read, the P9DR values are read for

the bits with the corresponding P9DDR bits set to 1.

For the bits with the corresponding P9DDR bits

cleared to 0, the pin states are read.

(3) Pin Functions

The relationship between register setting values and pin functions are as follows.

• P97/WAIT/CS256

The pin function is switched as shown below according to the operating mode and the

combination of the CS256E bit in SYSCR, the WMS1 bit in WSCR and the P97DDR bit.

Operating

mode

Extended mode Single-chip mode

WMS1 0 1 X

CS256E 0 1 X X

P97DDR 0 1 X X 0 1

Pin function P97 input pin P97 output

CS256 output

WAIT input

P97 input pin P97 output

[Legend] X: Don't care.