Datasheet

Section 8 I/O Ports
Rev. 2.00 Aug. 20, 2008 Page 239 of 1198
REJ09B0403-0200
• P92/HBE
The pin function is switched as shown below according to the operating mode, the OBE bit in
PTCNT0, and the P92DDR bit.
Operating
mode
Extended mode Single-chip mode
OBE 0 1 X
P92DDR 0 1 X 0 1
Pin function P92 input pin P92 output pin HBE output pin P92 input pin P92 output pin
[Legend] X: Don't care.
• P91/AH
The pin function is switched as shown below according to the operating mode, the ADMXE
bit in SYSCR2, and the P91DDR bit.
Operating
mode
Extended mode Single-chip mode
ADMXE 0 1 X
P91DDR 0 1 X 0 1
Pin function P91 input pin P91 output pin AH output pin P91 input pin P91 output pin
[Legend] X: Don't care.
• P90/LBE
The pin function is switched as shown below according to the operating mode, the OBE bit in
PTCNT0, and the P90DDR bit.
Operating
mode
Extended mode Single-chip mode
OBE 0 1 X
P90DDR 0 1 X 0 1
Pin function P90 input pin P90 output pin LBE output pin P90 input pin P90 output pin
[Legend] X: Don't care.