Datasheet

Section 8 I/O Ports
Rev. 2.00 Aug. 20, 2008 Page 265 of 1198
REJ09B0403-0200
(3) Port E Input Data Register (PEPIN)
PEPIN indicates the pin states of port E.
Bit Bit Name Initial Value R/W Description
7 PE7PIN Undefined* R
6 PE6PIN Undefined* R
5 PE5PIN Undefined* R
4 PE4PIN Undefined* R
3 PE3PIN Undefined* R
2 PE2PIN Undefined* R
1 PE1PIN Undefined* R
0 PE0PIN Undefined* R
When this register is read, the pin states are read.
Since this register is allocated to the same address as
PEDDR, writing to this register writes data to PEDDR
and the port E setting is changed.
Note: The initial value of these pins is determined in accordance with the state of pins PE7 to
PE0.
(4) Pin Functions
Port E pins can also function as LPC input/output pins. The pin function is switched according to
whether the LPC module is enabled or disabled. The LPC is disabled when all of the bits LPC1E,
LPC2E, and LPC3E in HICR0 and SCIFE in HICR5 are cleared to 0.
• PE7/SERIRQ
The pin function is switched as shown below according to whether the LPC is enabled or
disabled and the PE7DDR bit.
LPC Disabled Enabled
PE7DDR 0 1 X
Pin function PE7 input pin PE7 output pin SERIRQ input/output pin
[Legend] X: Don't care.