Datasheet

Section 8 I/O Ports
Rev. 2.00 Aug. 20, 2008 Page 271 of 1198
REJ09B0403-0200
• PF2/RS10
The pin function is switched as shown below according to the PF2DDR bit.
PF2DDR 0 1
Pin function PF2 input pin PF2 output pin
• PF1/RS9/MDC, PF0/RS8/MDIO
The pin function is switched as shown below according to the combination of the module stop
state in the EtherC and E-DMAC and the PFnDDR bit.
EtherC,
E-DMAC
Ether of them is stopped Both of them are stopped
PFnDDR 0 1 X
Pin function PFn input pin PFn output pin MDC output pin/
MDIO input/output pin
[Legend] X: Don't care. n = 1, 0