Datasheet

Section 8 I/O Ports
Rev. 2.00 Aug. 20, 2008 Page 301 of 1198
REJ09B0403-0200
• P56/EXCL/φ
The pin function is switched as shown below according to the combination of the EXCLE bit
in LPWRCR and the P56DDR bit.
P56DDR 0 1
EXCLE 0 1 X
Pin function P56 input pin EXCL input pin φ output pin
[Legend] X: Don't care.
• P55/IRQ13/SSI
The pin function is switched as shown below according to the RE bit in SSER of the SSU and
the P55DDR bit. When the ISS13 bit in ISSR16 is cleared to 0 and the IRQ13E bit in IER16 of
the interrupt controller is set to 1, this pin can be used as the IRQ13 input pin. To use as the
IRQ13 input pin, clear the P55DDR bit to 0.
RE 0 1
P55DDR 0 1 X
P55 input pin Pin function
IRQ13 input pin
P55 output pin SSI input pin
[Legend] X: Don't care.
• P54/IRQ12/SSO
The pin function is switched as shown below according to the TE bit in SSER of the SSU and
the P54DDR bit. When the ISS12 bit in ISSR16 is cleared to 0 and the IRQ12E bit in IER16 of
the interrupt controller is set to 1, this pin can be used as the IRQ12 input pin. To use as the
IRQ12 input pin, clear the P54DDR bit to 0.
TE 0 1
P54DDR 0 1 X
P54 input pin Pin function
IRQ12 input pin
P54 output pin SSO output pin
[Legend] X: Don't care.