Datasheet

Section 8 I/O Ports
Rev. 2.00 Aug. 20, 2008 Page 322 of 1198
REJ09B0403-0200
• P96
The pin function is switched as shown below according to the P96DDR bit.
P96DDR 0 1
Pin function P96 input pin P96 output pin
• P95/AS/IOS
The pin function is switched as shown below according to the operating mode and the
combination of the IOSE bit in SYSCR and the P95DDR bit.
Operating
mode
Extended mode Single-chip mode
P95DDR X 0 1
IOSE 0 1 X X
Pin function AS output pin IOS output pin P95 input pin P95 output pin
[Legend] X: Don't care.
• P94/ExPWX1
The pin function is switched as shown below according to the combination of the OEB bit in
DACR and the PWMXS bit in PTCNT0 of the PWMX_0 module and the P94DDR bit.
P94DDR 0 1 X
PWMXS 0 1 0 1 1
OEB X 0 X 0 1
Pin function P94 input pin P94 output pin ExPWX1 output pin
[Legend] X: Don't care.
• P93/ExPWX0
The pin function is switched as shown below according to the combination of the OEA bit in
DACR and the PWMXS bit in PTCNT0 of the PWMX_0 module and the P93DDR bit.
P93DDR 0 1 X
PWMXS 0 1 0 1 1
OEA X 0 X 0 1
Pin function P93 input pin P93 output pin ExPWX0 output pin
[Legend] X: Don't care.