Datasheet

Section 8 I/O Ports
Rev. 2.00 Aug. 20, 2008 Page 327 of 1198
REJ09B0403-0200
• PA6/ExIRQ6/EVENT6/A22/LNKSTA
The pin function is switched as shown below according to the setting of address 18 and the
PA6DDR bit.
Setting the ISS6 bit in ISSR makes the pin to function as the ExIRQ6 input pin.
When using the pin as the ExIRQ6 input, or an EVENT input pin, clear the PA6DDR bit to 0.
Though the settings for the EVENT input pin have been made, set the PA6DDR bit to 1 when
using the pin as the PA6 or A22 output pin.
When the module stop mode is cleared in both the EtherC and E-DMAC, this pin functions as
the LNKSTA input pin.
PA6DDR 0 1 1
Address 18 1 0
PA6 input pin Pin function
ExIRQ6 input pin/EVENT6 input pin
PA6 output pin A22 output pin
• PA5/ExIRQ5/EVENT5/A21/WOL
The pin function is switched as shown below according to the setting of the MPDE bit in
ECMR in EtherC, the address 18, and the PA5DDR bit.
Setting the ISS5 bit in ISSR to 1 makes the pin function as the ExIRQ5 input pin.
When using the pin as the ExIRQ5 input, or an EVENT input pin, clear the PA5DDR bit to 0.
Though the settings for the EVENT input pin have been made, set the PA5DDR bit to 1 when
using the pin as the A21 or PA5 output pin.
When the module stop mode is cleared in both the EtherC and E-DMAC, this pin functions as
the WOL output pin.
MPDE 0
PA5DDR 0 1 1
Address 18 X 1 0
PA5 input pin Pin function
ExIRQ5 input pin/
EVENT5 input pin
PA5 output pin A21 output pin