Datasheet

Section 11 8-Bit Timer (TMR)
Rev. 2.00 Aug. 20, 2008 Page 395 of 1198
REJ09B0403-0200
Internal clock
Clock X
Clock Y
Compare match AX
Compare match AY
Clear X
TCORA_Y
Comparator A_Y
Comparator B_Y
TCOR_Y
TCR_Y
TCORA1_X
Comparator A_X
TCNT_X
Comparator B_X
TCORB_Y TCORB_X
TCSR_X
TCR_X
TCNT_Y
Overflow X
Overflow Y
Compare match BX
Compare match BY
Select clock
Control logic
Internal bus
[Legend]
Interrupt signals
Clear Y
TMR_X
φ , φ /2, φ /4
TMR_Y
φ /4, φ /256, φ /2048
CMIAX
CMIBX
OVIX
CMIAY
CMIBY
OVIY
TCORA_Y:
TCORB_Y:
TCNT_Y:
TCSR_Y:
TCR_Y:
TCORA_X:
TCORB_X:
TCNT_X:
TCSR_X:
TCR_X:
TCORC:
Time constant register A_Y
Time constant register B_Y
Timer counter_Y
Timer control / status register_Y
Timer control register_Y
Time constant register A_X
Time constant register B_X
Timer counter_X
Timer control / status register_X
Timer control register_X
Tme constant registerC
Figure 11.2 Block Diagram of 8-Bit Timer (TMR_Y and TMR_X)