Datasheet

Rev. 2.00 Aug. 20, 2008 Page xliii of xlviii
Table 8.9 Port Functions ............................................................................................................273
Table 8.10 Port 1 Input Pull-Up MOS States............................................................................. 279
Table 8.11 Port 2 Input Pull-Up MOS States............................................................................. 284
Table 8.12 Port 3 Input Pull-Up MOS States............................................................................. 290
Table 8.13 Port 4 Input Pull-Up MOS States............................................................................. 298
Table 8.14 Port 6 Input Pull-Up MOS States............................................................................. 310
Table 8.15 Input Pull-Up MOS States........................................................................................ 331
Table 8.16 Port D Input Pull-Up MOS States ............................................................................347
Section 9 14-Bit PWM Timer (PWMX)
Table 9.1
Pin Configuration....................................................................................................... 360
Table 9.2 Clock Select of PWMX_1 and PWMX_0..................................................................365
Table 9.3 Settings and Operation (Examples when φ = 34 MHz).............................................. 368
Table 9.4 Locations of Additional Pulses Added to Base Pulse (When CFS = 1) .....................373
Section 10 16-Bit Free-Running Timer (FRT)
Table 10.1
FRT Interrupt Sources...........................................................................................386
Table 10.2 Switching of Internal Clock and FRC Operation.................................................. 391
Section 11 8-Bit Timer (TMR)
Table 11.1 (1)
Clock Input to TCNT and Count Condition (TMR_0) .......................................399
Table 11.1 (2) Clock Input to TCNT and Count Condition (TMR_1) ....................................... 400
Table 11.1 (3) Clock Input to TCNT and Count Condition (TMR_X, TMR_Y).......................400
Table 11.2 Registers Accessible by TMR_X/TMR_Y...............................................................405
Table 11.3 Interrupt Sources of 8-Bit Timers TMR_0, TMR_1, TMR_Y, and TMR_X........... 409
Table 11.4 Switching of Internal Clocks and TCNT Operation................................................. 413
Section 12 Watchdog Timer (WDT)
Table 12.1
Pin Configuration.....................................................................................................417
Table 12.2 WDT Interrupt Source..............................................................................................426
Section 13 Serial Communication Interface (SCI)
Table 13.1
Pin Configuration.....................................................................................................434
Table 13.2 Relationships between N Setting in BRR and Bit Rate B ........................................ 447
Table 13.3 Examples of BRR Settings for Various Bit Rates (Asynchronous Mode) ...............448
Table 13.4 Maximum Bit Rate for Each Frequency (Asynchronous Mode)..............................448
Table 13.5 Maximum Bit Rate with External Clock Input (Asynchronous Mode).................... 448
Table 13.6 BRR Settings for Various Bit Rates (Clock Synchronous Mode)............................ 449
Table 13.7 Maximum Bit Rate with External Clock Input (Clock Synchronous Mode) ...........450
Table 13.8 BRR Settings for Various Bit Rates (Smart Card Interface Mode, n = 0,
s = 372) .................................................................................................................... 450
Table 13.9 Maximum Bit Rate for Each Frequency (Smart Card Interface Mode, S = 372) ..... 450
Table 13.10 Serial Transfer Formats (Asynchronous Mode).....................................................452