Datasheet

Section 13 Serial Communication Interface (SCI)
Rev. 2.00 Aug. 20, 2008 Page 450 of 1198
REJ09B0403-0200
Table 13.7 Maximum Bit Rate with External Clock Input (Clock Synchronous Mode)
φ (MHz) External Input Clock (MHz) Maximum Bit Rate (bit/s)
20 3.3333 3333333.3
25 4.1667 4166666.7
34 5.6667 5666666.7
Table 13.8 BRR Settings for Various Bit Rates (Smart Card Interface Mode, n = 0, s = 372)
Operating Frequency φ (MHz)
20.00 21.4272 25 34
Bit Rate
(bit/s) n N Error (%) n N Error(%) n N Error (%) n N Error (%)
9600 0 2 –6.65 0 2 0.00 0 3 –12.49 0 4 –4.79
Table 13.9 Maximum Bit Rate for Each Frequency (Smart Card Interface Mode, S = 372)
φ (MHz) Maximum Bit Rate (bit/s) n N
20.00 26882 0 0
21.4272 28800 0 0
25.00 33602 0 0
34.00 45699 0 0