Datasheet

Section 15 Serial Communication Interface with FIFO (SCIF)
Rev. 2.00 Aug. 20, 2008 Page 512 of 1198
REJ09B0403-0200
15.3.4 Transmitter Holding Register (FTHR)
FTHR is an 8-bit write-only register that stores serial transmit data. It is accessible when the
DLAB bit in FLCR is 0. Write transmit data while the THRE bit in FLCR is set to 1.
Data can be written to FTHR when the THRE bit is set with the FIFO disabled. If data is written to
FTHR when the THRE bit is not set, the data is overwritten.
While the THRE bit is set with the FIFO enabled, up to 16 bytes of data can be written. If data is
written with the FIFO full, the written data is lost.
Bit Bit Name Initial Value R/W Description
7 to 0 Bit 7 to
bit 0
 W Stores serial data to be transmitted.
The data is 16 bytes when the FIFO is enabled.
15.3.5 Divisor Latch H, L (FDLH, FDLL)
The FDLH and FDLL are registers used to set the baud rate. They are accessible when the DLAB
bit in FLCR is 1. Frequency division ranging from 1 to (2
16
− 1) can be set with these registers.
The frequency divider circuit stops when both of FDLH and FDLL are 0 (initial value).
• FDLH
Bit Bit Name Initial Value R/W Description
7 to 0 Bit 7 to
bit 0
All 0 R/W Upper 8 bits of divisor latch
• FDLL
Bit Bit Name Initial Value R/W Description
7 to 0 Bit 7 to
bit 0
All 0 R/W Lower 8 bits of divisor latch
Baud rate = (Clock frequency input to baud rate generator) / (16 × divisor value)