Datasheet

Section 15 Serial Communication Interface with FIFO (SCIF)
Rev. 2.00 Aug. 20, 2008 Page 518 of 1198
REJ09B0403-0200
Bit Bit Name Initial Value R/W Description
2 STOP 0 R/W Stop Bit
Specifies the stop bit length for data transmission. For
data reception, only the first stop bit is checked
regardless of the setting.
0: 1 stop bit
1: 1.5 stop bits (data length: 5 bits) or 2 stop bits (data
length: 6 to 8 bits)
1
0
CLS1
CLS0
0
0
R/W
R/W
Character Length Select 0, 1
These bits specify transmit/receive character data
length.
00: Data length is 5 bits
01: Data length is 6 bits
10: Data length is 7 bits
11: Data length is 8 bits
15.3.10 Modem Control Register (FMCR)
FMCR controls output signals.
Bit Bit Name Initial Value R/W Description
7 to 5  All 0 R Reserved
These bits are always read as 0. The initial value
should not be changed.
4 LOOP
BACK
0 R/W Loopback Test
The transmit data output is internally connected to the
receive data input, and the transmit data output pin
(RxDF) becomes 1. The receive data input pin is
disconnected from external sources. The four modem
control input pins (DSR, CTS, RI, and DCD) are
disconnected from external sources, and the pins are
internally connected to the four modem control output
signals (DTR, RTS, OUT1, and OUT2), respectively.
The transmit data is received immediately in loopback
mode. Enabling/disabling of interrupts is set by the
OUT2LOOP bit in SCIFCR and FIER.
0: Loopback function disabled
1: Loopback function enabled