Datasheet

Section 15 Serial Communication Interface with FIFO (SCIF)
Rev. 2.00 Aug. 20, 2008 Page 525 of 1198
REJ09B0403-0200
Bit Bit Name Initial Value R/W Description
1 DDSR 0 R Delta Data Set Ready Indicator
Indicates a change in the DSR input signal after the
DDSR bit is read.
0: No change in the DSR input signal after FMSR
read
[Clearing condition]
FMSR read
1: A change in the DSR input signal after FMSR
read
[Setting condition]
A change in the DSR input signal
0 DCTS 0 R Delta Clear to Send Indicator
Indicates a change in the CTS input signal after the
DCTS bit is read.
0: No change in the CTS input signal after FMSR
read
[Clearing condition]
FMSR read
1: A change in the CTS input signal after FMSR read
[Setting condition]
A change in the CTS input signal
15.3.13 Scratch Pad Register (FSCR)
FSCR is not used for SCIF control, but is used to temporarily store program data.
Bit Bit Name Initial Value R/W Description
7 to 0 Bit 7 to bit 0 All 0 R/W Temporarily stores program data.