Datasheet

Section 16 Multiplex Mode
Rev. 2.00 Aug. 20, 2008 Page 546 of 1198
REJ09B0403-0200
16.3.2 Serial Multiplexed Mode Register 1 (SMR1)
SMR1 is a register that monitors the port and controls the port output. In mode 2, this register
monitors the status of the RTS pin of SCIF.
Bit Bit Name
Initial
Value
R/W Description
7 CTS1  R Monitors the state of the CTS pin of COM1 in mode 1.
Monitors the state of the RTS pin of SCIF in mode 2.
6 DTR1 1 R/W Controls the output on the DTR pin of COM1 in modes 3
and 4.
0: 0 is output
1: 1 is output
5 RTS1 1 R/W Controls the output on the RTS pin of COM1.
Controls the input on the CTS pin of SCIF in mode 2.
0: 0 is output
1: 1 is output
4 CTS3  R Monitors the state of the RTS pin input of SCIF in mode
4.
3   R Reserved
2 RTS3 1 R/W Controls the output on the CTS pin of SCIF.
0: 0 is output
1: 1 is output
1,0   R/W Reserved