Datasheet

Section 17 Synchronous Serial Communication Unit (SSU)
Rev. 2.00 Aug. 20, 2008 Page 553 of 1198
REJ09B0403-0200
Section 17 Synchronous Serial Communication Unit (SSU)
This LSI has synchronous serial communication unit (SSU) channels. The SSU has master mode
in which this LSI outputs clocks as a master device for synchronous serial communication and
slave mode in which clocks are input from an external device for synchronous serial
communication. Synchronous serial communication can be performed with devices having
different clock polarity and clock phase. Figure 17.1 is a block diagram of the SSU.
17.1 Features
• Choice of SSU mode and clock synchronous mode
• Choice of master mode and slave mode
• Choice of standard mode and bidirectional mode
• Synchronous serial communication with devices with different clock polarity and clock phase
• Choice of 8/16/32-bit width of transmit/receive data
• Full-duplex communication capability
The shift register is incorporated, enabling transmission and reception to be executed
simultaneously.
• Consecutive serial communication
• Choice of LSB-first or MSB-first transfer
• Choice of clock sources
φ/4, φ/8, φ/16, φ/32, φ/64, φ/128, φ/256, or an external clock
• Five interrupt sources
Transmit-end, transmit-data-register-empty, receive-data-full, overrun-error, and conflict error
• Module stop mode can be set.