Datasheet

ManualsBrandsRENESAS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller LQFP 144 (20x20) 16-Bit 34 MHz I/O number 106

Section 19 LPC Interface (LPC)

Rev. 2.00 Aug. 20, 2008 Page 670 of 1198

REJ09B0403-0200

The following registers are necessary for SMIC mode

• SMIC flag register (SMICFLG)

• SMIC control/status register (SMICCSR)

• SMIC data register (SMICDTR)

• SMIC interrupt register 0 (SMICIR0)

• SMIC interrupt register 1 (SMICIR1)

The following registers are necessary for BT mode

• BT status register 0 (BTSR0)

• BT status register 1 (BTSR1)

• BT control/status register 0 (BTCSR0)

• BT control/status register 1 (BTCSR1)

• BT control register (BTCR)

• BT data buffer (BTDTR)

• BT interrupt mask register (BTIMSR)

• FIFO valid size register 0 (BTFVSR0)

• FIFO valid size register 1 (BTFVSR1)