Datasheet

Section 19 LPC Interface (LPC)
Rev. 2.00 Aug. 20, 2008 Page 747 of 1198
REJ09B0403-0200
19.4.7 LPC Interface Serialized Interrupt Operation (SERIRQ)
A host interrupt request can be issued from the LPC interface by means of the SERIRQ pin. In a
host interrupt request via the SERIRQ pin, LCLK cycles are counted from the start frame of the
serialized interrupt transfer cycle generated by the host or a peripheral function, and a request
signal is generated by the frame corresponding to that interrupt. The timing is shown in figure
19.10.
IRQ1 IRQ1Host controller None None
SERIRQ
Drive source
LCLK
START
Start frame IRQ0 frame IRQ1 frame
IRQ2 frame
SL
or
H
HRTRST RST RS
T
IRQ15 Host controllerNoneNone
SERIRQ
Driver
LCLK
STARTSTOP
IOCHCK frame Stop frame Next cycleIRQ14 frame
IRQ15 frame
RST RSTRST RTHI
H = Host control, SL = Slave control, R = Recovery, T = Turnaround, S = Sample
H = Host control, R = Recovery, T = Turnaround, S = Sample, I = Idle
Figure 19.10 SERIRQ Timing