Datasheet

Section 20 Ethernet Controller (EtherC)
Rev. 2.00 Aug. 20, 2008 Page 759 of 1198
REJ09B0403-0200
20.2 Input/Output Pins
Table 20.1 lists the pin configuration of the EtherC.
Table 20.1 Pin Configuration
Type Abbreviation I/O Function
RM_REF-CLK Input Transmit/Receive Clock
Timing reference signal for the RM_TX-EN, RM_TXD1
to RM_TXD0, RM_CRS-DV, RM_RXD1 to RM_RXD0,
and RM_RX-ER signals
RM_TX-EN Output Transmit Enable
Indicates that transmit data is ready on pins RM_TXD1
and RM_TXD0.
RM_TXD1
RM_TXD0
Output Transmit Data
2-bit transmit data
RM_CRS-DV Input Carrier Detection/Receive Data Valid
Carrier detection signal/Signal that indicates that valid
receive data is on pins RM_RXD1 and RM_RXD0.
RM_RXD1
RM_RXD0
Input Receive Data
2-bit receive data
RMII
interface
signals
RM_RX-ER Input Receive Error
Indicates the error state during data reception.
MDC Output Management Data Clock
Reference clock signal for information transfer via MDIO
PHY
register
interface
signals
MDIO Input/
Output
Management Data I/O
Bidirectional signal for exchange of management
information between the station management entity
(STA) and physical layer (PHY)
LNKSTA Input Link Status
Inputs link status from PHY-LSI
Others
WOL Output Wake-On-LAN
Signal indicating reception of Magic Packet
EXOUT Output External Output