Datasheet

Section 21 Ethernet Controller Direct Memory Access Controller (E-DMAC)
Rev. 2.00 Aug. 20, 2008 Page 816 of 1198
REJ09B0403-0200
Transmit descriptor Transmit buffer
Valid transmit data
T
A
C
T
T
D
L
E
T
F
P
1
T
F
P
0
TFS26 to TFS0TD0
TDLTD1
TBA
Padding (4 bytes)
TD2
31 30 29 28 27 26 0
T
F
E
31 16
31 0
Fixed at H'0000
15 0
Figure 21.2 Relationship between Transmit Descriptor and Transmit Buffer