Datasheet

Section 21 Ethernet Controller Direct Memory Access Controller (E-DMAC)
Rev. 2.00 Aug. 20, 2008 Page 818 of 1198
REJ09B0403-0200
Bit Bit Name
Initial
value
R/W Description
29
28
TFP1
TFP0
0
0
R/W
R/W
Transmit Frame Position 1, 0
These two bits specify the relationship between the
transmit buffer and transmit frame. In the preceding
and following descriptors, a logically positive
relationship must be maintained between the settings
of this bit and the TDLE bit.
00: Frame transmission for transmit buffer indicated
by this descriptor continues (frame is not
concluded)
01: Transmit buffer indicated by this descriptor
contains end of frame (frame is concluded)
10: Transmit buffer indicated by this descriptor is start
of frame (frame is not concluded)
11: Contents of transmit buffer indicated by this
descriptor are equivalent to one frame (one
frame/one buffer)
27 TFE 0 R/W Transmit Frame Error
Indicates that one or other bit of the transmit frame
status indicated by bits 26 to 0 is set.
0: No error during transmission
1: An error occurred during transmission
26 to 0 TFS26 to
TFS0
All 0 R/W Transmit Frame Status
TFS26 to TFS9: Reserved (The write value should
always be 0.)
TFS8: Transmit Abort Detection (indicates any of bits
TFS3 to TFS0 has been set.)
TFS7 to TFS4: Reserved (The write value should
always be 0.)
TFS3: Carrier Not Detected (corresponds to CND bit
in EESR)
TFS2: Detect Loss of Carrier (corresponds to DLC bit
in EESR)
TFS1: Delayed Collision Detect (corresponds to CD
bit in EESR)
TFS0: Transmit Retry Over (corresponds to TRO bit
in EESR)