Datasheet

Section 21 Ethernet Controller Direct Memory Access Controller (E-DMAC)
Rev. 2.00 Aug. 20, 2008 Page 822 of 1198
REJ09B0403-0200
Bit Bit Name
Initial
value
R/W Description
29
28
RFP1
RFP0
0
0
R/W
R/W
Receive Frame Position
These two bits specify the relationship between the
receive buffer and receive frame.
00: Frame reception for receive buffer indicated by
this descriptor continues (frame is not concluded)
01: Receive buffer indicated by this descriptor
contains end of frame (frame is concluded)
10: Receive buffer indicated by this descriptor is start
of frame (frame is not concluded)
11: Contents of receive buffer indicated by this
descriptor are equivalent to one frame (one
frame/one buffer)
27 RFE 0 R/W Receive Frame Error
Indicates that one or other bit of the receive frame
status indicated by bits 26 to 0 is set. Whether or not
the receive frame status information is copied into this
bit is specified by the transmit/receive status copy
enable register.
0: No error during reception
1: A certain kind of error occurred during reception