Datasheet

Section 21 Ethernet Controller Direct Memory Access Controller (E-DMAC)
Rev. 2.00 Aug. 20, 2008 Page 828 of 1198
REJ09B0403-0200
This LSI + memory
Reception flowchart
E-DMAC EtherCReceive FIFO Ethernet
EtherC/E-DMAC
initialization
Descriptor and
receive
buffer setting
Reception
completed
Receive data transfer
Receive data transfer
Frame reception
Start of reception
Descriptor read
Descriptor write-back
Descriptor write-back
Descriptor read (receive
ready for the next frame)
Descriptor read
Figure 21.5 Sample Reception Flowchart