Datasheet

Section 22 USB Function Module (USB)
Rev. 2.00 Aug. 20, 2008 Page 840 of 1198
REJ09B0403-0200
22.3.7 Interrupt Enable Register 0 (IER0)
IER0 enables the interrupt requests of interrupt flag register 0 (IFR0). When an interrupt flag is set
to 1 while the corresponding bit of each interrupt is set to 1, an interrupt request is sent to the
CPU. The interrupt vector number is determined by the contents of interrupt select register 0
(ISR0).
Bit Bit Name
Initial
Value
R/W Description
7 BRST 0 R/W Bus Reset
6 EP1 FULL 0 R/W EP1 FIFO Full
5 EP2 TR 0 R/W EP2 Transfer Request
4 EP2 EMPTY 0 R/W EP2 FIFO Empty
3 SETUP TS 0 R/W Setup Command Receive Complete
2 EP0o TS 0 R/W EP0o Receive Complete
1 EP0i TR 0 R/W EP0i Transfer Request
0 EP0i TS 0 R/W EP0i Transmission Complete
22.3.8 Interrupt Enable Register 1 (IER1)
IER1 enables the interrupt requests of interrupt flag register 1 (IFR1). When an interrupt flag is set
to 1 while the corresponding bit of each interrupt is set to 1, an interrupt request is sent to the
CPU. The interrupt vector number is determined by the contents of interrupt select register 1
(ISR1).
Bit Bit Name
Initial
Value
R/W Description
7 to 3  All 0 R Reserved
These bits are always read as 0. The initial value
should not be changed.
2 EP3 TR 0 R/W EP3 Transfer Request
1 EP3 TS 0 R/W EP3 Transmission Complete
0 VBUSF 0 R/W USB Bus Connect