Datasheet

Section 24 RAM
Rev. 2.00 Aug. 20, 2008 Page 913 of 1198
REJ09B0403-0200
Section 24 RAM
This LSI has 40 Kbytes of on-chip high-speed static RAM. The RAM is connected to the CPU by
a 16-bit data bus, enabling one-state access by the CPU to both byte data and word data.
The on-chip RAM can be enabled or disabled by means of the RAME bit in the system control
register (SYSCR). For details on SYSCR, see section 3.2.2, System Control Register (SYSCR).