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R8C/2E Group, R8C/2F Group RENESAS MCU 1. REJ03B0222-0100 Rev.1.00 Dec 14, 2007 Overview 1.1 Features The R8C/2E Group and R8C/2F Group of single-chip MCUs incorporates the R8C/Tiny Series CPU core, employing sophisticated instructions for a high level of efficiency. With 1 Mbyte of address space, and it is capable of executing instructions at high speed. In addition, the CPU core boasts a multiplier for high-speed operation processing.
R8C/2E Group, R8C/2F Group 1.1.2 1. Overview Specifications Tables 1.1 and 1.2 outlines the Specifications for R8C/2E Group and Tables 1.3 and 1.4 outlines the Specifications for R8C/2F Group. Table 1.1 Item CPU Specifications for R8C/2E Group (1) Function Specification Central R8C/Tiny series core processing unit • Number of fundamental instructions: 89 • Minimum instruction execution time: 50 ns (f(XIN) = 20 MHz, VCC = 3.0 to 5.5 V) 100 ns (f(XIN) = 10 MHz, VCC = 2.7 to 5.
R8C/2E Group, R8C/2F Group Table 1.2 1. Overview Specifications for R8C/2E Group (2) Item Specification Flash Memory • Programming and erasure voltage: VCC = 2.7 to 5.5 V • Programming and erasure endurance: 100 times • Program security: ROM code protect, ID code check • Debug functions: On-chip debug, on-board flash rewrite function Operating Frequency/Supply f(XIN) = 20 MHz (VCC = 3.0 to 5.5 V), f(XIN) = 10 MHz (VCC = 2.7 to 5.5 V) Voltage Current consumption Typ. 10 mA (VCC = 5.
R8C/2E Group, R8C/2F Group Table 1.3 Item CPU 1. Overview Specifications for R8C/2F Group (1) Function Specification Central R8C/Tiny series core processing unit • Number of fundamental instructions: 89 • Minimum instruction execution time: 50 ns (f(XIN) = 20 MHz, VCC = 3.0 to 5.5 V) 100 ns (f(XIN) = 10 MHz, VCC = 2.7 to 5.
R8C/2E Group, R8C/2F Group Table 1.4 1. Overview Specifications for R8C/2F Group (2) Item Specification Flash Memory • Programming and erasure voltage: VCC = 2.7 to 5.5 V • Programming and erasure endurance: 10,000 times (data flash) 1,000 times (program ROM) • Program security: ROM code protect, ID code check • Debug functions: On-chip debug, on-board flash rewrite function Operating Frequency/Supply f(XIN) = 20 MHz (VCC = 3.0 to 5.5 V), f(XIN) = 10 MHz (VCC = 2.7 to 5.
R8C/2E Group, R8C/2F Group 1.2 1. Overview Product List Table 1.5 lists Product List for R8C/2E Group, Figure 1.1 shows a Part Number, Memory Size, and Package of R8C/2E Group, Table 1.6 lists Product List for R8C/2F Group, and Figure 1.2 shows a Part Number, Memory Size, and Package of R8C/2F Group. Table 1.5 Product List for R8C/2E Group Current of Dec. 2007 Part No.
R8C/2E Group, R8C/2F Group Table 1.6 1. Overview Product List for R8C/2F Group R5F212F2NFP R5F212F4NFP R5F212F2DFP R5F212F4DFP R5F212F2NXXXFP R5F212F4NXXXFP ROM Capacity Program ROM Data flash 8 Kbytes 1 Kbyte × 2 16 Kbytes 1 Kbyte × 2 8 Kbytes 1 Kbyte × 2 16 Kbytes 1 Kbyte × 2 8 Kbytes 1 Kbyte × 2 16 Kbytes 1 Kbyte × 2 R5F212F2DXXXFP R5F212F4DXXXFP 8 Kbytes 16 Kbytes Part No. Current of Dec.
R8C/2E Group, R8C/2F Group 1.3 1. Overview Block Diagram Figure 1.3 shows a Block Diagram.
R8C/2E Group, R8C/2F Group 1.4 1. Overview Pin Assignment P1_4/TXD0 P1_3/KI3/AN11/(TRBO)(2) P1_1/KI1/AN9/TRCIOA/TRCTRG VREF/P4_2 P1_2/KI2/AN10/TRCIOB P1_0/KI0/AN8 P3_4/(TRCIOC)(2) P3_3/INT3/TRCCLK Figure 1.4 shows Pin Assignments (Top View). Table 1.7 outlines the Pin Name Information by Pin Number.
R8C/2E Group, R8C/2F Group Table 1.
R8C/2E Group, R8C/2F Group 1.5 1. Overview Pin Functions Table 1.8 list Pin Functions. Table 1.8 Pin Functions Type Symbol I/O Type Description Power supply input VCC, VSS I Apply 2.7 V to 5.5 V to the VCC pin. Apply 0 V to the VSS pin. Analog power supply input AVCC, AVSS I Power supply for the A/D converter. Connect a capacitor between AVCC and AVSS. Reset input RESET I Input “L” on this pin resets the MCU. MODE MODE I Connect this pin to VCC via a resistor.
R8C/2E Group, R8C/2F Group 2. 2. Central Processing Unit (CPU) Central Processing Unit (CPU) Figure 2.1 shows the CPU Registers. The CPU contains 13 registers. R0, R1, R2, R3, A0, A1, and FB configure a register bank. There are two sets of register bank.
R8C/2E Group, R8C/2F Group 2.1 2. Central Processing Unit (CPU) Data Registers (R0, R1, R2, and R3) R0 is a 16-bit register for transfer, arithmetic, and logic operations. The same applies to R1 to R3. R0 can be split into high-order bits (R0H) and low-order bits (R0L) to be used separately as 8-bit data registers. R1H and R1L are analogous to R0H and R0L. R2 can be combined with R0 and used as a 32-bit data register (R2R0). R3R1 is analogous to R2R0. 2.
R8C/2E Group, R8C/2F Group 2.8.7 2. Central Processing Unit (CPU) Interrupt Enable Flag (I) The I flag enables maskable interrupts. Interrupt are disabled when the I flag is set to 0, and are enabled when the I flag is set to 1. The I flag is set to 0 when an interrupt request is acknowledged. 2.8.8 Stack Pointer Select Flag (U) ISP is selected when the U flag is set to 0; USP is selected when the U flag is set to 1.
R8C/2E Group, R8C/2F Group 3. 3. Memory Memory 3.1 R8C/2E Group Figure 3.1 is a Memory Map of R8C/2E Group. The R8C/2E group has 1 Mbyte of address space from addresses 00000h to FFFFFh. The internal ROM is allocated lower addresses, beginning with address 0FFFFh. For example, a 16-Kbyte internal ROM area is allocated addresses 0C000h to 0FFFFh. The fixed interrupt vector table is allocated addresses 0FFDCh to 0FFFFh. They store the starting address of each interrupt routine.
R8C/2E Group, R8C/2F Group 3.2 3. Memory R8C/2F Group Figure 3.2 is a Memory Map of R8C/2F Group. The R8C/2F group has 1 Mbyte of address space from addresses 00000h to FFFFFh. The internal ROM (program ROM) is allocated lower addresses, beginning with address 0FFFFh. For example, a 16-Kbyte internal ROM area is allocated addresses 0C000h to 0FFFFh. The fixed interrupt vector table is allocated addresses 0FFDCh to 0FFFFh. They store the starting address of each interrupt routine.
R8C/2E Group, R8C/2F Group 4. 4. Special Function Registers (SFRs) Special Function Registers (SFRs) An SFR (special function register) is a control register for a peripheral function. Tables 4.1 to 4.7 list the special function registers. Table 4.
R8C/2E Group, R8C/2F Group Table 4.2 4.
R8C/2E Group, R8C/2F Group Table 4.3 4.
R8C/2E Group, R8C/2F Group Table 4.4 4.
R8C/2E Group, R8C/2F Group Table 4.5 4.
R8C/2E Group, R8C/2F Group Table 4.6 4.
R8C/2E Group, R8C/2F Group Table 4.7 Address 0180h 0181h 0182h 0183h 0184h 0185h 0186h 0187h 0188h 0189h 018Ah 018Bh 018Ch 018Dh 018Eh 018Fh 0190h 0191h 0192h 0193h 0194h 0195h 0196h 0197h 0198h 0199h 019Ah 019Bh 019Ch 019Dh 019Eh 019Fh 01A0h 01A1h 01A2h 01A3h 01A4h 01A5h 01A6h 01A7h 01A8h 01A9h 01AAh 01ABh 01ACh 01ADh 01AEh 01AFh 01B0h 01B1h 01B2h 01B3h 01B4h 01B5h 01B6h 01B7h 01B8h 01B9h 01BAh 01BBh 01BCh 01BDh 01BEh 01BFh 4.
R8C/2E Group, R8C/2F Group 5. 5. Electrical Characteristics Electrical Characteristics Table 5.1 Absolute Maximum Ratings Symbol Parameter Rated Value Unit −0.3 to 6.5 V Input voltage −0.3 to VCC + 0.3 V VO Output voltage −0.3 to VCC + 0.3 V Pd Power dissipation 500 mW Topr Operating ambient temperature −20 to 85 (N version) / −40 to 85 (D version) °C Tstg Storage temperature −65 to 150 °C VCC/AVCC Supply voltage VI Table 5.
R8C/2E Group, R8C/2F Group 5. Electrical Characteristics P0 P1 30pF P3 P4 P5 Figure 5.1 Table 5.3 Ports P0, P1, and P3 to P5 Timing Measurement Circuit A/D Converter Characteristics Symbol Parameter − Resolution − Absolute accuracy Conditions Standard Min. Typ. Max. Unit Vref = AVCC − − 10 Bits 10-bit mode φAD = 10 MHz, Vref = AVCC = 5.0 V − − ±3 LSB 8-bit mode φAD = 10 MHz, Vref = AVCC = 5.0 V − − ±2 LSB 10-bit mode φAD = 10 MHz, Vref = AVCC = 3.
R8C/2E Group, R8C/2F Group Table 5.5 5. Electrical Characteristics Comparator Characteristics(1) Symbol Parameter Conditions Standard Min. Typ. Max. Unit 0 − VCC−1.2 V −0.3 − VCC+0.3 V Input offset voltage − − ±100 mV Response time − − 200 ns Vcref Comparator reference voltage Vcin Comparator input voltage Vofs Tcrsp NOTE: 1. VCC = 2.7 to 5.5 V at Topr = −20 to 85°C (N version) / −40 to 85°C (D version), unless otherwise specified. Table 5.
R8C/2E Group, R8C/2F Group Table 5.7 5. Electrical Characteristics Flash Memory (Data flash Block A, Block B) Electrical Characteristics(4) Symbol Parameter Conditions Standard Min. Typ. Max. Unit 10,000(3) − − times Byte program time (program/erase endurance ≤ 1,000 times) − 50 400 µs − Byte program time (program/erase endurance > 1,000 times) − 65 − µs − Block erase time (program/erase endurance ≤ 1,000 times) − 0.
R8C/2E Group, R8C/2F Group 5. Electrical Characteristics Suspend request (maskable interrupt request) FMR46 Clock-dependent time Fixed time Access restart td(SR-SUS) Figure 5.2 Table 5.
R8C/2E Group, R8C/2F Group Table 5.10 5. Electrical Characteristics Power-on Reset Circuit, Voltage Monitor 0 Reset Electrical Characteristics Symbol Parameter Condition Standard Min. Typ. Max. Unit Vpor1 Power-on reset valid voltage(3) − − 0.1 V Vpor2 Power-on reset valid voltage 0 − 2.6 V trth External power VCC rise gradient(2) 20 − − mV/msec NOTES: 1. The measurement condition is Topr = −20 to 85°C (N version) / −40 to 85°C (D version), unless otherwise specified. 2.
R8C/2E Group, R8C/2F Group Table 5.11 High-speed On-Chip Oscillator Circuit Electrical Characteristics Symbol fOCO40M 5.
R8C/2E Group, R8C/2F Group Table 5.14 Electrical Characteristics (1) [VCC = 5 V] Symbol VOH 5. Electrical Characteristics Parameter Output “H” voltage Except P1_0 to P1_7, XOUT P1_0 to P1_7 Condition Output “L” voltage Except P1_0 to P1_7, XOUT VCC − 2.0 − VCC V VCC − 0.5 − VCC V Drive capacity HIGH IOH = −10 mA VCC − 2.0 − VCC V IOH = −5 mA VCC − 2.0 − VCC V Drive capacity HIGH IOH = −1 mA VCC − 2.0 − VCC V VCC − 2.0 − VCC V − − 2.
R8C/2E Group, R8C/2F Group Table 5.15 Symbol ICC 5. Electrical Characteristics Electrical Characteristics (2) [Vcc = 5 V] (Topr = −20 to 85°C (N version) / −40 to 85°C (D version), unless otherwise specified.) Parameter Condition Unit Typ. Max.
R8C/2E Group, R8C/2F Group 5. Electrical Characteristics Timing Requirements (Unless Otherwise Specified: VCC = 5 V, VSS = 0 V at Topr = 25°C) [VCC = 5 V] Table 5.16 XIN Input Symbol Standard Parameter Min. Max. Unit tc(XIN) XIN input cycle time 50 − ns tWH(XIN) XIN input “H” width 25 − ns tWL(XIN) XIN input “L” width 25 − ns VCC = 5 V tC(XIN) tWH(XIN) XIN input tWL(XIN) Figure 5.4 Table 5.
R8C/2E Group, R8C/2F Group Table 5.18 5. Electrical Characteristics Serial Interface Symbol Standard Parameter Min. Max.
R8C/2E Group, R8C/2F Group Table 5.20 Electrical Characteristics (3) [VCC = 3 V] Symbol VOH 5. Electrical Characteristics Parameter Output “H” voltage Output “L” voltage Hysteresis Unit Typ. Max. VCC − 0.5 − VCC V IOH = −1 mA P1_0 to P1_7 Drive capacity HIGH IOH = −2 mA VCC − 0.5 − VCC V Drive capacity LOW IOH = −1 mA VCC − 0.5 − VCC V Drive capacity HIGH IOH = −0.1 mA VCC − 0.5 − VCC V Drive capacity LOW IOH = −50 µA VCC − 0.5 − VCC V − − 0.
R8C/2E Group, R8C/2F Group Table 5.21 Symbol ICC 5. Electrical Characteristics Electrical Characteristics (4) [Vcc = 3 V] (Topr = −20 to 85°C (N version) / −40 to 85°C (D version), unless otherwise specified.) Parameter Condition Unit Typ. Max.
R8C/2E Group, R8C/2F Group 5. Electrical Characteristics Timing requirements (Unless Otherwise Specified: VCC = 3 V, VSS = 0 V at Topr = 25°C) [VCC = 3 V] Table 5.22 XIN Input Symbol Standard Parameter Min. Max. Unit tc(XIN) XIN input cycle time 100 − ns tWH(XIN) XIN input “H” width 40 − ns tWL(XIN) XIN input “L” width 40 − ns VCC = 3 V tC(XIN) tWH(XIN) XIN input tWL(XIN) Figure 5.8 XIN Input Timing Diagram when VCC = 3 V Table 5.
R8C/2E Group, R8C/2F Group Table 5.24 5. Electrical Characteristics Serial Interface Symbol Standard Parameter Min. Max.
R8C/2E Group, R8C/2F Group Package Dimensions Package Dimensions Diagrams showing the latest package dimensions and mounting information are available in the “Packages” section of the Renesas Technology website. JEITA Package Code P-LQFP32-7x7-0.80 RENESAS Code PLQP0032GB-A Previous Code 32P6U-A MASS[Typ.] 0.2g HD *1 D 24 17 NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET.
REVISION HISTORY REVISION HISTORY Rev. Date 0.10 Aug 01, 2007 1.00 Dec 14, 2007 R8C/2E Group, R8C/2F Group Datasheet R8C/2E Group, R8C/2F Group Datasheet Description Page − Summary First Edition issued All pages “Under development” deleted 2, 4 Table 1.1, Table 1.3: “Interrupts” revised 6, 7 Table 1.5, Table 1.6: “(D)” deleted 15, 16 Figure 3.1, Figure 3.2: “Expanded area” deleted 17 Table 4.1: “002Ch” added 24 Table 5.2: IOH(sum), NOTE2 revised 30 Table 5.
Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Notes: 1. This document is provided for reference purposes only so that Renesas customers may select the appropriate Renesas products for their use.