Datasheet R8C/34C Group RENESAS MCU 1. R01DS0007EJ0100 Rev 1.00 Aug. 24, 2010 Overview 1.1 Features The R8C/34C Group of single-chip MCUs incorporates the R8C CPU core, employing sophisticated instructions for a high level of efficiency. With 1 Mbyte of address space, and it is capable of executing instructions at high speed. In addition, the CPU core boasts a multiplier for high-speed operation processing. Power consumption is low, and the supported operating modes allow additional power control.
R8C/34C Group 1.1.2 1. Overview Specifications Tables 1.1 and 1.2 outline the Specifications for R8C/34C Group. Table 1.1 Item CPU Specifications for R8C/34C Group (1) Function Central processing unit Memory ROM, RAM, Data flash Power Supply Voltage detection Voltage circuit Detection I/O Ports Programmable I/O ports Clock Clock generation circuits Interrupts Watchdog Timer DTC (Data Transfer Controller) Timer Timer RA Timer RB Timer RC Timer RD Timer RE R01DS0007EJ0100 Rev 1.00 Aug.
R8C/34C Group Table 1.2 Item Serial Interface 1.
R8C/34C Group 1.2 1. Overview Product List Table 1.3 lists Product List for R8C/34C Group, and Figure 1.1 shows a Part Number, Memory Size, and Package of R8C/34C Group. Table 1.3 Product List for R8C/34C Group Part No. R5F21344CNFP R5F21345CNFP R5F21346CNFP R5F21344CDFP R5F21345CDFP R5F21346CDFP Part No.
R8C/34C Group 1.3 1. Overview Block Diagram Figure 1.2 shows a Block Diagram.
R8C/34C Group 1.4 1. Overview Pin Assignment P1_0/AN8/KI0(/TRCIOD) P1_1/AN9/KI1(/TRCIOA/TRCTRG) P1_2/AN10/Kl2(/TRCIOB) P1_3/AN11/Kl3/TRBO(/TRCIOC) P1_4(/TRCCLK/TXD0) P1_5(/INT1/RXD0/TRAIO) P1_6/IVREF1(/CLK0) P1_7/IVCMP1/INT1(/TRAIO) P4_5/ADTRG/INT0(/RXD2/SCL2) P6_5/INT4(/CLK1/CLK2/TRCIOB) P6_6/INT2(/TXD2/SDA2/TRCIOC) P6_7(/INT3/TRCIOD) Figure 1.3 shows the Pin Assignment (Top View). Tables 1.4 and 1.5 outline the Pin Name Information by Pin Number.
R8C/34C Group Table 1.4 1.
R8C/34C Group Table 1.5 1.
R8C/34C Group 1.5 1. Overview Pin Functions Tables 1.6 and 1.7 list Pin Functions. Table 1.6 Pin Functions (1) Item Power supply input Analog power supply input Reset input Pin Name VCC, VSS AVCC, AVSS I/O Type Description − Apply 1.8 V to 5.5 V to the VCC pin. Apply 0 V to the VSS pin. − Power supply for the A/D converter. Connect a capacitor between AVCC and AVSS. I Input “L” on this pin resets the MCU.
R8C/34C Group 1. Overview Table 1.
R8C/34C Group 2. 2. Central Processing Unit (CPU) Central Processing Unit (CPU) Figure 2.1 shows the CPU Registers. The CPU contains 13 registers. R0, R1, R2, R3, A0, A1, and FB configure a register bank. There are two sets of register bank.
R8C/34C Group 2.1 2. Central Processing Unit (CPU) Data Registers (R0, R1, R2, and R3) R0 is a 16-bit register for transfer, arithmetic, and logic operations. The same applies to R1 to R3. R0 can be split into high-order bits (R0H) and low-order bits (R0L) to be used separately as 8-bit data registers. R1H and R1L are analogous to R0H and R0L. R2 can be combined with R0 and used as a 32-bit data register (R2R0). R3R1 is analogous to R2R0. 2.
R8C/34C Group 2.8.7 2. Central Processing Unit (CPU) Interrupt Enable Flag (I) The I flag enables maskable interrupts. Interrupts are disabled when the I flag is set to 0, and are enabled when the I flag is set to 1. The I flag is set to 0 when an interrupt request is acknowledged. 2.8.8 Stack Pointer Select Flag (U) ISP is selected when the U flag is set to 0; USP is selected when the U flag is set to 1.
R8C/34C Group 3. 3. Memory Memory 3.1 R8C/34C Group Figure 3.1 is a Memory Map of R8C/34C Group. The R8C/34C Group has a 1-Mbyte address space from addresses 00000h to FFFFFh. The internal ROM (program ROM) is allocated lower addresses, beginning with address 0FFFFh. For example, a 32-Kbyte internal ROM area is allocated addresses 08000h to 0FFFFh. The fixed interrupt vector table is allocated addresses 0FFDCh to 0FFFFh. The starting address of each interrupt routine is stored here.
R8C/34C Group 4. 4. Special Function Registers (SFRs) Special Function Registers (SFRs) An SFR (special function register) is a control register for a peripheral function. Tables 4.1 to 4.12 list the special function registers. Table 4.13 lists the ID Code Areas and Option Function Select Area. Table 4.
R8C/34C Group Table 4.2 4.
R8C/34C Group Table 4.3 Address 0080h 0081h 0082h 0083h 0084h 0085h 0086h 0087h 0088h 0089h 008Ah 008Bh 008Ch 008Dh 008Eh 008Fh 0090h 0091h 0092h 0093h 0094h 0095h 0096h 0097h 0098h 0099h 009Ah 009Bh 009Ch 009Dh 009Eh 009Fh 00A0h 00A1h 00A2h 00A3h 00A4h 00A5h 00A6h 00A7h 00A8h 00A9h 00AAh 00ABh 00ACh 00ADh 00AEh 00AFh 00B0h 00B1h 00B2h 00B3h 00B4h 00B5h 00B6h 00B7h 00B8h 00B9h 00BAh 00BBh 00BCh 00BDh 00BEh 00BFh 4.
R8C/34C Group Table 4.4 Address 00C0h 00C1h 00C2h 00C3h 00C4h 00C5h 00C6h 00C7h 00C8h 00C9h 00CAh 00CBh 00CCh 00CDh 00CEh 00CFh 00D0h 00D1h 00D2h 00D3h 00D4h 00D5h 00D6h 00D7h 00D8h 00D9h 00DAh 00DBh 00DCh 00DDh 00DEh 00DFh 00E0h 00E1h 00E2h 00E3h 00E4h 00E5h 00E6h 00E7h 00E8h 00E9h 00EAh 00EBh 00ECh 00EDh 00EEh 00EFh 00F0h 00F1h 00F2h 00F3h 00F4h 00F5h 00F6h 00F7h 00F8h 00F9h 00FAh 00FBh 00FCh 00FDh 00FEh 00FFh 4.
R8C/34C Group Table 4.5 Address 0100h 0101h 0102h 0103h 0104h 0105h 0106h 0107h 0108h 0109h 010Ah 010Bh 010Ch 010Dh 010Eh 010Fh 0110h 0111h 0112h 0113h 0114h 0115h 0116h 0117h 0118h 0119h 011Ah 011Bh 011Ch 011Dh 011Eh 011Fh 0120h 0121h 0122h 0123h 0124h 0125h 0126h 0127h 0128h 0129h 012Ah 012Bh 012Ch 012Dh 012Eh 012Fh 0130h 0131h 0132h 0133h 0134h 0135h 0136h 0137h 0138h 0139h 013Ah 013Bh 013Ch 013Dh 013Eh 013Fh Note: 1. 4.
R8C/34C Group Table 4.6 Address 0140h 0141h 0142h 0143h 0144h 0145h 0146h 0147h 0148h 0149h 014Ah 014Bh 014Ch 014Dh 014Eh 014Fh 0150h 0151h 0152h 0153h 0154h 0155h 0156h 0157h 0158h 0159h 015Ah 015Bh 015Ch 015Dh 015Eh 015Fh 0160h 0161h 0162h 0163h 0164h 0165h 0166h 0167h 0168h 0169h 016Ah 016Bh 016Ch 016Dh 016Eh 016Fh 0170h 0171h 0172h 0173h 0174h 0175h 0176h 0177h 0178h 0179h 017Ah 017Bh 017Ch 017Dh 017Eh 017Fh 4.
R8C/34C Group Table 4.7 Address 0180h 0181h 0182h 0183h 0184h 0185h 0186h 0187h 0188h 0189h 018Ah 018Bh 018Ch 018Dh 018Eh 018Fh 0190h 0191h 0192h 0193h 0194h 0195h 0196h 0197h 0198h 0199h 019Ah 019Bh 019Ch 019Dh 019Eh 019Fh 01A0h 01A1h 01A2h 01A3h 01A4h 01A5h 01A6h 01A7h 01A8h 01A9h 01AAh 01ABh 01ACh 01ADh 01AEh 01AFh 01B0h 01B1h 01B2h 01B3h 01B4h 01B5h 01B6h 01B7h 01B8h 01B9h 01BAh 01BBh 01BCh 01BDh 01BEh 01BFh 4.
R8C/34C Group Table 4.8 Address 01C0h 01C1h 01C2h 01C3h 01C4h 01C5h 01C6h 01C7h 01C8h 01C9h 01CAh 01CBh 01CCh 01CDh 01CEh 01CFh 01D0h 01D1h 01D2h 01D3h 01D4h 01D5h 01D6h 01D7h 01D8h 01D9h 01DAh 01DBh 01DCh 01DDh 01DEh 01DFh 01E0h 01E1h 01E2h 01E3h 01E4h 01E5h 01E6h 01E7h 01E8h 01E9h 01EAh 01EBh 01ECh 01EDh 01EEh 01EFh 01F0h 01F1h 01F2h 01F3h 01F4h 01F5h 01F6h 01F7h 01F8h 01F9h 01FAh 01FBh 01FCh 01FDh 01FEh 01FFh 4.
R8C/34C Group Table 4.9 Address 2C00h 2C01h 2C02h 2C03h 2C04h 2C05h 2C06h 2C07h 2C08h 2C09h 2C0Ah : : 2C3Ah 2C3Bh 2C3Ch 2C3Dh 2C3Eh 2C3Fh 2C40h 2C41h 2C42h 2C43h 2C44h 2C45h 2C46h 2C47h 2C48h 2C49h 2C4Ah 2C4Bh 2C4Ch 2C4Dh 2C4Eh 2C4Fh 2C50h 2C51h 2C52h 2C53h 2C54h 2C55h 2C56h 2C57h 2C58h 2C59h 2C5Ah 2C5Bh 2C5Ch 2C5Dh 2C5Eh 2C5Fh 2C60h 2C61h 2C62h 2C63h 2C64h 2C65h 2C66h 2C67h 2C68h 2C69h 2C6Ah 2C6Bh 2C6Ch 2C6Dh 2C6Eh 2C6Fh 4.
R8C/34C Group Table 4.10 Address 2C70h 2C71h 2C72h 2C73h 2C74h 2C75h 2C76h 2C77h 2C78h 2C79h 2C7Ah 2C7Bh 2C7Ch 2C7Dh 2C7Eh 2C7Fh 2C80h 2C81h 2C82h 2C83h 2C84h 2C85h 2C86h 2C87h 2C88h 2C89h 2C8Ah 2C8Bh 2C8Ch 2C8Dh 2C8Eh 2C8Fh 2C90h 2C91h 2C92h 2C93h 2C94h 2C95h 2C96h 2C97h 2C98h 2C99h 2C9Ah 2C9Bh 2C9Ch 2C9Dh 2C9Eh 2C9Fh 2CA0h 2CA1h 2CA2h 2CA3h 2CA4h 2CA5h 2CA6h 2CA7h 2CA8h 2CA9h 2CAAh 2CABh 2CACh 2CADh 2CAEh 2CAFh 4.
R8C/34C Group Table 4.11 Address 2CB0h 2CB1h 2CB2h 2CB3h 2CB4h 2CB5h 2CB6h 2CB7h 2CB8h 2CB9h 2CBAh 2CBBh 2CBCh 2CBDh 2CBEh 2CBFh 2CC0h 2CC1h 2CC2h 2CC3h 2CC4h 2CC5h 2CC6h 2CC7h 2CC8h 2CC9h 2CCAh 2CCBh 2CCCh 2CCDh 2CCEh 2CCFh 2CD0h 2CD1h 2CD2h 2CD3h 2CD4h 2CD5h 2CD6h 2CD7h 2CD8h 2CD9h 2CDAh 2CDBh 2CDCh 2CDDh 2CDEh 2CDFh 2CE0h 2CE1h 2CE2h 2CE3h 2CE4h 2CE5h 2CE6h 2CE7h 2CE8h 2CE9h 2CEAh 2CEBh 2CECh 2CEDh 2CEEh 2CEFh 4.
R8C/34C Group SFR Information (12) (1) Table 4.12 Address 2CF0h 2CF1h 2CF2h 2CF3h 2CF4h 2CF5h 2CF6h 2CF7h 2CF8h 2CF9h 2CFAh 2CFBh 2CFCh 2CFDh 2CFEh 2CFFh 2D00h : 2FFFh 4. Special Function Registers (SFRs) DTC Control Data 22 Register Symbol DTCD22 DTC Control Data 23 DTCD23 After Reset XXh XXh XXh XXh XXh XXh XXh XXh XXh XXh XXh XXh XXh XXh XXh XXh X: Undefined Note: 1. The blank areas are reserved and cannot be accessed by users. Table 4.
R8C/34C Group 5. 5. Electrical Characteristics Electrical Characteristics Table 5.1 Absolute Maximum Ratings Symbol Parameter Rated Value Unit −0.3 to 6.5 V Input voltage −0.3 to VCC + 0.3 V VO Output voltage −0.3 to VCC + 0.3 V Pd Power dissipation 500 mW Topr Operating ambient temperature −20 to 85 (N version) / −40 to 85 (D version) °C Tstg Storage temperature −65 to 150 °C VCC/AVCC Supply voltage VI R01DS0007EJ0100 Rev 1.00 Aug.
R8C/34C Group Table 5.2 5. Electrical Characteristics Recommended Operating Conditions Symbol Parameter Conditions Standard Min. Typ. Max. Unit VCC/AVCC Supply voltage 1.8 − 5.5 VSS/AVSS Supply voltage − 0 − V 0.8 VCC − VCC V VIH Input “H” voltage Other than CMOS input CMOS Input level Input level selection input switching : 0.35 VCC function (I/O port) Input level selection : 0.5 VCC Input level selection : 0.7 VCC 4.0 V ≤ VCC ≤ 5.5 V 0.5 VCC − VCC V 2.7 V ≤ VCC < 4.0 V 0.
R8C/34C Group 5. Electrical Characteristics P0 P1 P2 P3 P4 P6 Figure 5.1 30pF Ports P0 to P4, P6 Timing Measurement Circuit R01DS0007EJ0100 Rev 1.00 Aug.
R8C/34C Group Table 5.3 Symbol − − 5. Electrical Characteristics A/D Converter Characteristics Parameter Resolution Absolute accuracy Conditions 10-bit mode Vref = AVCC Vref = AVCC = 5.0 V LSB − − ±5 LSB − − ±5 LSB − − ±2 LSB − − ±2 LSB − − ±2 LSB − − ±2 LSB 4.0 V ≤ Vref = AVCC ≤ 5.5 V (2) 2 − 20 MHz 3.2 V ≤ Vref = AVCC ≤ 5.5 V (2) 2 − 16 MHz 2.7 V ≤ Vref = AVCC ≤ 5.5 V (2) 2 − 10 MHz 2.2 V ≤ Vref = AVCC ≤ 5.5 V 2 − 5 MHz − 2.2 2.2 0.
R8C/34C Group Table 5.4 Symbol − − tsu RO IVref 5. Electrical Characteristics D/A Converter Characteristics Parameter Resolution Absolute accuracy Setup time Output resistor Reference power input current Condition Min. − − − − − (Note 2) Standard Typ. Max. − 8 − 2.5 − 3 6 − − 1.5 Unit Bit LSB µs kΩ mA Notes: 1. VCC/AVCC = Vref = 2.7 to 5.5 V and Topr = −20 to 85°C (N version) / −40 to 85°C (D version), unless otherwise specified. 2.
R8C/34C Group Table 5.6 Symbol − − − td(SR-SUS) − − 5.
R8C/34C Group Table 5.7 5. Electrical Characteristics Flash Memory (Data flash Block A to Block D) Electrical Characteristics Symbol − − − − − td(SR-SUS) − − td(CMDRSTREADY) − − − − Parameter times − 160 1,500 µs − 300 1,500 µs − 0.2 1 s − 0.3 1 s − − ms 0 − 5+CPU clock × 3 cycles − − − µs − − 2.7 1.8 − −20 (7) − 30+CPU clock × 1 cycle 30+CPU clock × 1 cycle 5.5 5.
R8C/34C Group Table 5.8 5. Electrical Characteristics Voltage Detection 0 Circuit Electrical Characteristics Symbol Vdet0 Parameter Condition Min. Standard Typ. Max. Unit Voltage detection level Vdet0_0 (2) 1.80 1.90 2.05 V Voltage detection level Vdet0_1 (2) 2.15 2.35 2.50 V Voltage detection level Vdet0_2 (2) 2.70 2.85 3.05 V Voltage detection level Vdet0_3 (2) 3.55 3.80 4.05 V − 6 150 µs − 1.
R8C/34C Group Table 5.10 5. Electrical Characteristics Voltage Detection 2 Circuit Electrical Characteristics Symbol Vdet2 Parameter Condition Voltage detection level Vdet2_0 At the falling of VCC Hysteresis width at the rising of Vcc in voltage detection 2 circuit At the falling of Vcc from Voltage detection 2 circuit response time (2) 5 V to (Vdet2_0 − 0.1) V Voltage detection circuit self power consumption VCA27 = 1, VCC = 5.
R8C/34C Group Table 5.12 5.
R8C/34C Group Table 5.15 Symbol 5. Electrical Characteristics Timing Requirements of Synchronous Serial Communication Unit (SSU) (1) Parameter tSUCYC SSCK clock cycle time tHI tLO tRISE SSCK clock “H” width SSCK clock “L” width SSCK clock rising time tFALL SSCK clock falling time Conditions Standard Typ. − − Max.
R8C/34C Group 5.
R8C/34C Group 5.
R8C/34C Group 5. Electrical Characteristics tHI VIH or VOH SSCK VIL or VOL tLO tSUCYC SSO (output) tOD SSI (input) tSU Figure 5.6 tH I/O Timing of Synchronous Serial Communication Unit (SSU) (Clock Synchronous Communication Mode) R01DS0007EJ0100 Rev 1.00 Aug.
R8C/34C Group Table 5.16 5. Electrical Characteristics Timing Requirements of I2C bus Interface (1) Symbol Parameter Condition tSCL SCL input cycle time tSCLH SCL input “H” width tSCLL SCL input “L” width tsf tSP SCL, SDA input fall time SCL, SDA input spike pulse rejection time tBUF Standard Typ. (2) − 12tCYC + 600 (2) − 3tCYC + 300 Min. Max.
R8C/34C Group Table 5.17 5. Electrical Characteristics Electrical Characteristics (1) [4.2 V ≤ Vcc ≤ 5.
R8C/34C Group Table 5.18 Symbol ICC 5. Electrical Characteristics Electrical Characteristics (2) [3.3 V ≤ Vcc ≤ 5.5 V] (Topr = −20 to 85°C (N version) / −40 to 85°C (D version), unless otherwise specified.) Parameter Condition Power supply High-speed current clock mode (VCC = 3.3 to 5.5 V) Single-chip mode, output pins are open, other pins are VSS High-speed on-chip oscillator mode Low-speed on-chip oscillator mode Low-speed clock mode Wait mode Stop mode R01DS0007EJ0100 Rev 1.00 Aug.
R8C/34C Group 5. Electrical Characteristics Timing Requirements (Unless Otherwise Specified: VCC = 5 V, VSS = 0 V at Topr = 25°C) Table 5.19 External Clock Input (XOUT, XCIN) Symbol tc(XOUT) tWH(XOUT) tWL(XOUT) tc(XCIN) tWH(XCIN) tWL(XCIN) Standard Min. Max.
R8C/34C Group Table 5.21 5. Electrical Characteristics Serial Interface Symbol tc(CK) tW(CKH) tW(CKL) td(C-Q) th(C-Q) tsu(D-C) th(C-D) Standard Min. Max. 200 − 100 − 100 − − 50 0 − 50 − 90 − Parameter CLKi input cycle time CLKi input “H” width CLKi input “L” width TXDi output delay time TXDi hold time RXDi input setup time RXDi input hold time Unit ns ns ns ns ns ns ns i = 0 to 2 VCC = 5 V tC(CK) tW(CKH) CLKi tW(CKL) th(C-Q) TXDi td(C-Q) tsu(D-C) th(C-D) RXDi i = 0 to 2 Figure 5.10 Table 5.
R8C/34C Group Table 5.23 5. Electrical Characteristics Electrical Characteristics (3) [2.7 V ≤ Vcc < 4.
R8C/34C Group Table 5.24 Symbol ICC 5. Electrical Characteristics Electrical Characteristics (4) [2.7 V ≤ Vcc < 3.3 V] (Topr = −20 to 85°C (N version) / −40 to 85°C (D version), unless otherwise specified.) Parameter Condition Power supply current High-speed (VCC = 2.7 to 3.3 V) clock mode Single-chip mode, output pins are open, other pins are VSS High-speed on-chip oscillator mode Low-speed on-chip oscillator mode Low-speed clock mode Wait mode Stop mode R01DS0007EJ0100 Rev 1.00 Aug.
R8C/34C Group 5. Electrical Characteristics Timing Requirements (Unless Otherwise Specified: VCC = 3 V, VSS = 0 V at Topr = 25°C) Table 5.25 External Clock Input (XOUT, XCIN) Symbol tc(XOUT) tWH(XOUT) tWL(XOUT) tc(XCIN) tWH(XCIN) tWL(XCIN) Standard Min. Max.
R8C/34C Group Table 5.27 5. Electrical Characteristics Serial Interface Symbol tc(CK) tW(CKH) tW(CKL) td(C-Q) th(C-Q) tsu(D-C) th(C-D) Standard Min. Max. 300 − 150 − 150 − − 80 0 − 70 − 90 − Parameter CLKi input cycle time CLKi input “H” width CLKi Input “L” width TXDi output delay time TXDi hold time RXDi input setup time RXDi input hold time Unit ns ns ns ns ns ns ns i = 0 to 2 VCC = 3 V tC(CK) tW(CKH) CLKi tW(CKL) th(C-Q) TXDi td(C-Q) tsu(D-C) th(C-D) RXDi i = 0 to 2 Figure 5.14 Table 5.
R8C/34C Group Table 5.29 5. Electrical Characteristics Electrical Characteristics (5) [1.8 V ≤ Vcc < 2.7 V] Symbol Parameter VOH Output “H” voltage Other than XOUT VOL Output “L” voltage XOUT Other than XOUT VT+-VT- Hysteresis XOUT INT0, INT1, INT2, INT3, INT4, KI0, KI1, KI2, KI3, TRAIO, TRBO, TRCIOA, TRCIOB, TRCIOC, TRCIOD, TRDIOA0, TRDIOB0, TRDIOC0, TRDIOD0, TRDIOA1, TRDIOB1, TRDIOC1, TRDIOD1, TRCTRG, TRCCLK, ADTRG, RXD0, RXD1, RXD2, CLK0, CLK1, CLK2, SSI, SCL, SDA, SSO Standard Min. Typ.
R8C/34C Group Table 5.30 Symbol ICC 5. Electrical Characteristics Electrical Characteristics (6) [1.8 V ≤ Vcc < 2.7 V] (Topr = −20 to 85°C (N version) / −40 to 85°C (D version), unless otherwise specified.) Parameter Condition Power supply current High-speed (VCC = 1.8 to 2.7 V) clock mode Single-chip mode, output pins are open, other pins are VSS High-speed on-chip oscillator mode Low-speed on-chip oscillator mode Low-speed clock mode Wait mode Stop mode R01DS0007EJ0100 Rev 1.00 Aug.
R8C/34C Group 5. Electrical Characteristics Timing Requirements (Unless Otherwise Specified: VCC = 2.2 V, VSS = 0 V at Topr = 25°C) Table 5.31 External Clock Input (XOUT, XCIN) Symbol tc(XOUT) tWH(XOUT) tWL(XOUT) tc(XCIN) tWH(XCIN) tWL(XCIN) Standard Min. Max. 200 − 90 − 90 − 14 − 7 − 7 − Parameter XOUT input cycle time XOUT input “H” width XOUT input “L” width XCIN input cycle time XCIN input “H” width XCIN input “L” width tC(XOUT), tC(XCIN) tWH(XOUT), tWH(XCIN) Unit ns ns ns µs µs µs VCC = 2.
R8C/34C Group Table 5.33 5. Electrical Characteristics Serial Interface Symbol tc(CK) tW(CKH) tW(CKL) td(C-Q) th(C-Q) tsu(D-C) th(C-D) Standard Min. Max. 800 − 400 − 400 − − 200 0 − 150 − 90 − Parameter CLKi input cycle time CLKi input “H” width CLKi input “L” width TXDi output delay time TXDi hold time RXDi input setup time RXDi input hold time Unit ns ns ns ns ns ns ns i = 0 to 2 VCC = 2.2 V tC(CK) tW(CKH) CLKi tW(CKL) th(C-Q) TXDi td(C-Q) tsu(D-C) th(C-D) RXDi i = 0 to 2 Figure 5.
R8C/34C Group Package Dimensions Package Dimensions Diagrams showing the latest package dimensions and mounting information are available in the “Packages” section of the Renesas Electronics website. JEITA Package Code P-LQFP48-7x7-0.50 RENESAS Code PLQP0048KB-A Previous Code 48P6Q-A MASS[Typ.] 0.2g HD *1 D 36 25 37 NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET.
REVISION HISTORY REVISION HISTORY R8C/34C Group Datasheet R8C/34C Group Datasheet Description Rev. Date 0.10 Aug. 07, 2009 − First Edition issued 1.00 Aug. 24, 2010 All “Preliminary” and “Under development” deleted 4 Table1.3 revised Page Summary 27 to 53 “5. Electrical Characteristics” added All trademarks and registered trademarks are the property of their respective owners.
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