R8C/3JC Group RENESAS MCU 1. REJ03B0302-0100 Rev.1.00 May 25, 2010 Overview 1.1 Features The R8C/3JC Group of single-chip MCUs incorporates the R8C CPU core, employing sophisticated instructions for a high level of efficiency. With 1 Mbyte of address space, and it is capable of executing instructions at high speed. In addition, the CPU core boasts a multiplier for high-speed operation processing. Power consumption is low, and the supported operating modes allow additional power control.
R8C/3JC Group 1.1.2 1. Overview Specifications Tables 1.1 and 1.2 outline the Specifications for R8C/3JC Group. Table 1.1 Item CPU Specifications for R8C/3JC Group (1) Function Central processing unit Memory ROM, RAM, Data flash Power Supply Voltage detection Voltage circuit Detection I/O Ports Programmable I/O ports Clock Clock generation circuits Interrupts Watchdog Timer DTC (Data Transfer Controller) Timer Timer RA Timer RB Timer RC Timer RD Timer RE REJ03B0302-0100 Rev.1.
R8C/3JC Group Table 1.2 Item Serial Interface 1. Overview Specifications for R8C/3JC Group (2) Function UART0, UART1 UART2 Synchronous Serial Communication Unit (SSU) I2C bus LIN Module A/D Converter D/A Converter Comparator B Flash Memory Operating Frequency/Supply Voltage Current consumption Operating Ambient Temperature Package REJ03B0302-0100 Rev.1.
R8C/3JC Group 1.2 1. Overview Product List Table 1.3 lists Product List for R8C/3JC Group, and Figure 1.1 shows a Part Number, Memory Size, and Package of R8C/3JC Group. Table 1.3 Product List for R8C/3JC Group Part No. R5F213J2CNNP R5F213J4CNNP R5F213J5CNNP R5F213J6CNNP Part No. ROM Capacity Program ROM Data flash 8 Kbytes 1 Kbyte × 4 16 Kbytes 1 Kbyte × 4 24 Kbytes 1 Kbyte × 4 32 Kbytes 1 Kbyte × 4 Current of May 2010 RAM Capacity 1 Kbyte 1.5 Kbytes 2 Kbytes 2.
R8C/3JC Group 1.3 1. Overview Block Diagram Figure 1.2 shows a Block Diagram.
R8C/3JC Group 1.4 1. Overview Pin Assignment P4_5/ADTRG/INT0(/RXD2/SCL2) P6_6/INT2(/TXD2/SDA2/TRCIOC) P1_7/IVCMP1/INT1(/TRAIO) P1_5(/INT1/RXD0/TRAIO) P1_6/IVREF1(/CLK0) P1_4(/TXD0/TRCCLK) P1_3/AN11/Kl3/TRBO(/TRCIOC) P1_2/AN10/Kl2(/TRCIOB) P1_1/AN9/KI1(/TRCIOA/TRCTRG) Figure 1.3 shows Pin Assignment (Top View). Tables 1.4 and 1.5 outline the Pin Name Information by Pin Number.
R8C/3JC Group Table 1.4 1.
R8C/3JC Group Table 1.5 1. Overview Pin Name Information by Pin Number (2) I/O Pin Functions for Peripheral Modules Pin Number Control Pin Port 31 P0_4 32 P0_3 33 P0_2 34 P0_1 35 36 Interrupt Timer TREO/ (TRCIOB) (TRCIOB) (TRCIOA/ TRCTRG) (TRCIOA/ TRCTRG) P4_2 Serial Interface SSU I2C bus A/D Converter, D/A Converter, Comparator B AN3 (CLK1) AN4 (RXD1) AN5 (TXD1) AN6 VREF MODE Note: 1. Can be assigned to the pin in parentheses by a program. REJ03B0302-0100 Rev.1.
R8C/3JC Group 1.5 1. Overview Pin Functions Tables 1.6 and 1.7 list Pin Functions. Table 1.6 Pin Functions (1) Item Pin Name I/O Type Description Power supply input VCC, VSS − Apply 1.8 V to 5.5 V to the VCC pin. Apply 0 V to the VSS pin. Analog power supply input AVCC, AVSS − Power supply for the A/D converter. Connect a capacitor between AVCC and AVSS. Reset input RESET I Input “L” on this pin resets the MCU. MODE MODE I Connect this pin to VCC via a resistor.
R8C/3JC Group 1. Overview Table 1.
R8C/3JC Group 2. 2. Central Processing Unit (CPU) Central Processing Unit (CPU) Figure 2.1 shows the CPU Registers. The CPU contains 13 registers. R0, R1, R2, R3, A0, A1, and FB configure a register bank. There are two sets of register bank.
R8C/3JC Group 2.1 2. Central Processing Unit (CPU) Data Registers (R0, R1, R2, and R3) R0 is a 16-bit register for transfer, arithmetic, and logic operations. The same applies to R1 to R3. R0 can be split into high-order bits (R0H) and low-order bits (R0L) to be used separately as 8-bit data registers. R1H and R1L are analogous to R0H and R0L. R2 can be combined with R0 and used as a 32-bit data register (R2R0). R3R1 is analogous to R2R0. 2.
R8C/3JC Group 2.8.7 2. Central Processing Unit (CPU) Interrupt Enable Flag (I) The I flag enables maskable interrupts. Interrupts are disabled when the I flag is set to 0, and are enabled when the I flag is set to 1. The I flag is set to 0 when an interrupt request is acknowledged. 2.8.8 Stack Pointer Select Flag (U) ISP is selected when the U flag is set to 0; USP is selected when the U flag is set to 1.
R8C/3JC Group 3. 3. Memory Memory 3.1 R8C/3JC Group Figure 3.1 is a Memory Map of R8C/3JC Group. The R8C/3JC Group has a 1-Mbyte address space from addresses 00000h to FFFFFh. The internal ROM (program ROM) is allocated lower addresses, beginning with address 0FFFFh. For example, a 32-Kbyte internal ROM area is allocated addresses 08000h to 0FFFFh. The fixed interrupt vector table is allocated addresses 0FFDCh to 0FFFFh. The starting address of each interrupt routine is stored here.
R8C/3JC Group 4. 4. Special Function Registers (SFRs) Special Function Registers (SFRs) An SFR (special function register) is a control register for a peripheral function. Tables 4.1 to 4.12 list the special function registers. Table 4.13 lists the ID Code Areas and Option Function Select Area. Table 4.
R8C/3JC Group Table 4.2 4.
R8C/3JC Group Table 4.3 Address 0080h 0081h 0082h 0083h 0084h 0085h 0086h 0087h 0088h 0089h 008Ah 008Bh 008Ch 008Dh 008Eh 008Fh 0090h 0091h 0092h 0093h 0094h 0095h 0096h 0097h 0098h 0099h 009Ah 009Bh 009Ch 009Dh 009Eh 009Fh 00A0h 00A1h 00A2h 00A3h 00A4h 00A5h 00A6h 00A7h 00A8h 00A9h 00AAh 00ABh 00ACh 00ADh 00AEh 00AFh 00B0h 00B1h 00B2h 00B3h 00B4h 00B5h 00B6h 00B7h 00B8h 00B9h 00BAh 00BBh 00BCh 00BDh 00BEh 00BFh 4.
R8C/3JC Group Table 4.4 4.
R8C/3JC Group Table 4.5 Address 0100h 0101h 0102h 0103h 0104h 0105h 0106h 0107h 0108h 0109h 010Ah 010Bh 010Ch 010Dh 010Eh 010Fh 0110h 0111h 0112h 0113h 0114h 0115h 0116h 0117h 0118h 0119h 011Ah 011Bh 011Ch 011Dh 011Eh 011Fh 0120h 0121h 0122h 0123h 0124h 0125h 0126h 0127h 0128h 0129h 012Ah 012Bh 012Ch 012Dh 012Eh 012Fh 0130h 0131h 0132h 0133h 0134h 0135h 0136h 0137h 0138h 0139h 013Ah 013Bh 013Ch 013Dh 013Eh 013Fh Note: 1. 4.
R8C/3JC Group Table 4.6 4.
R8C/3JC Group Table 4.7 4.
R8C/3JC Group Table 4.8 4.
R8C/3JC Group Table 4.9 4.
R8C/3JC Group Table 4.10 4.
R8C/3JC Group Table 4.11 4.
R8C/3JC Group 4. Special Function Registers (SFRs) SFR Information (12) (1) Table 4.12 Address Register 2CF0h DTC Control Data 22 2CF1h 2CF2h 2CF3h 2CF4h 2CF5h 2CF6h 2CF7h 2CF8h DTC Control Data 23 2CF9h 2CFAh 2CFBh 2CFCh 2CFDh 2CFEh 2CFFh 2D00h : 2FFFh X: Undefined Note: 1. The blank areas are reserved and cannot be accessed by users. Table 4.13 ID Code Areas and Option Function Select Area Address : FFDBh : FFDFh : FFE3h : FFEBh : FFEFh : FFF3h : FFF7h : FFFBh : FFFFh Area Name Notes: 1. 2.
R8C/3JC Group 5. 5. Electrical Characteristics Electrical Characteristics Table 5.14 Absolute Maximum Ratings Symbol Parameter Rated Value Unit −0.3 to 6.5 V Input voltage −0.3 to VCC + 0.3 V VO Output voltage −0.3 to VCC + 0.3 V Pd Power dissipation 500 mW Topr Operating ambient temperature −20 to 85 (N version) °C Tstg Storage temperature −65 to 150 °C VCC/AVCC Supply voltage VI REJ03B0302-0100 Rev.1.
R8C/3JC Group Table 5.15 5. Electrical Characteristics Recommended Operating Conditions Symbol Parameter Conditions Standard Min. Typ. Max. Unit VCC/AVCC Supply voltage 1.8 − 5.5 VSS/AVSS Supply voltage − 0 − V 0.8 VCC − VCC V VIH Input “H” voltage Other than CMOS input 0.5 VCC − VCC V 2.7 V ≤ VCC < 4.0 V 0.55 VCC − VCC V 1.8 V ≤ VCC < 2.7 V 0.65 VCC − VCC V 4.0 V ≤ VCC ≤ 5.5 V 0.65 VCC − VCC V 2.7 V ≤ VCC < 4.0 V 0.7 VCC − VCC V 1.8 V ≤ VCC < 2.7 V 0.
R8C/3JC Group 5. Electrical Characteristics P0 P1 P2 P3 P4 P6 Figure 5.1 30pF Ports P0 to P4, P6 Timing Measurement Circuit REJ03B0302-0100 Rev.1.
R8C/3JC Group Table 5.16 Symbol − − 5. Electrical Characteristics A/D Converter Characteristics Parameter Resolution Absolute accuracy Conditions 10-bit mode Vref = AVCC Vref = AVCC = 5.0 V LSB − − ±5 LSB − − ±5 LSB − − ±2 LSB − − ±2 LSB − − ±2 LSB − − ±2 LSB 4.0 V ≤ Vref = AVCC ≤ 5.5 V (2) 2 − 20 MHz 3.2 V ≤ Vref = AVCC ≤ 5.5 V (2) 2 − 16 MHz 2.7 V ≤ Vref = AVCC ≤ 5.5 V (2) 2 − 10 MHz 2.2 V ≤ Vref = AVCC ≤ 5.5 V 2 − 5 MHz − 2.15 2.15 0.75 − 2.
R8C/3JC Group Table 5.17 5. Electrical Characteristics D/A Converter Characteristics Symbol − − tsu RO IVref Parameter Resolution Absolute accuracy Setup time Output resistor Reference power input current Condition Min. − − − − − (Note 2) Standard Typ. Max. − 8 − 2.5 − 3 6 − − 1.5 Unit Bit LSB µs kΩ mA Notes: 1. VCC/AVCC = Vref = 2.7 to 5.5 V and Topr = −20 to 85°C (N version), unless otherwise specified. 2.
R8C/3JC Group Table 5.19 5.
R8C/3JC Group Table 5.20 5. Electrical Characteristics Flash Memory (Data flash Block A to Block D) Electrical Characteristics Symbol − − − − − td(SR-SUS) − − Parameter − − Data hold time (7) READY) − − Standard Typ. − Max. − times − 160 1,500 µs − 300 1,500 µs − 0.2 1 s − 0.3 1 s − − ms 0 − 5+CPU clock × 3 cycles − − − µs − − 2.7 1.8 −20 20 − 30+CPU clock × 1 cycle 30+CPU clock × 1 cycle 5.5 5.5 85 − Min.
R8C/3JC Group Table 5.21 5. Electrical Characteristics Voltage Detection 0 Circuit Electrical Characteristics Symbol Vdet0 Parameter Condition Min. Standard Typ. Max. Unit Voltage detection level Vdet0_0 (2) 1.80 1.90 2.05 V Voltage detection level Vdet0_1 (2) 2.15 2.35 2.50 V Voltage detection level Vdet0_2 (2) 2.70 2.85 3.05 V Voltage detection level Vdet0_3 (2) 3.55 3.80 4.05 V − 6 150 µs − 1.
R8C/3JC Group Table 5.23 5. Electrical Characteristics Voltage Detection 2 Circuit Electrical Characteristics Symbol Vdet2 Parameter Condition Voltage detection level Vdet2_0 At the falling of VCC Hysteresis width at the rising of Vcc in voltage detection 2 circuit At the falling of Vcc from Voltage detection 2 circuit response time (2) 5 V to (Vdet2_0 − 0.1) V Voltage detection circuit self power consumption VCA27 = 1, VCC = 5.
R8C/3JC Group Table 5.25 5.
R8C/3JC Group Table 5.28 Symbol 5. Electrical Characteristics Timing Requirements of Synchronous Serial Communication Unit (SSU) (1) Parameter tSUCYC SSCK clock cycle time tHI tLO tRISE SSCK clock “H” width SSCK clock “L” width SSCK clock rising time tFALL SSCK clock falling time Conditions Standard Typ. − − Max.
R8C/3JC Group 5.
R8C/3JC Group 5.
R8C/3JC Group 5. Electrical Characteristics tHI VIH or VOH SSCK VIL or VOL tLO tSUCYC SSO (output) tOD SSI (input) tSU Figure 5.6 tH I/O Timing of Synchronous Serial Communication Unit (SSU) (Clock Synchronous Communication Mode) REJ03B0302-0100 Rev.1.
R8C/3JC Group Table 5.29 5. Electrical Characteristics Timing Requirements of I2C bus Interface (1) Symbol Parameter Condition tSCL SCL input cycle time tSCLH SCL input “H” width tSCLL SCL input “L” width tsf tSP SCL, SDA input fall time SCL, SDA input spike pulse rejection time tBUF Standard Typ. (2) − 12tCYC + 600 (2) − 3tCYC + 300 Min. Max.
R8C/3JC Group Table 5.30 5. Electrical Characteristics Electrical Characteristics (1) [4.2 V ≤ Vcc ≤ 5.
R8C/3JC Group Table 5.31 Symbol ICC 5. Electrical Characteristics Electrical Characteristics (2) [3.3 V ≤ Vcc ≤ 5.5 V] (Topr = −20 to 85°C (N version), unless otherwise specified.) Parameter Condition Power supply High-speed current clock mode (VCC = 3.3 to 5.5 V) Single-chip mode, output pins are open, other pins are VSS High-speed on-chip oscillator mode Low-speed on-chip oscillator mode Low-speed clock mode Wait mode Stop mode REJ03B0302-0100 Rev.1.
R8C/3JC Group 5. Electrical Characteristics Timing Requirements (Unless Otherwise Specified: VCC = 5 V, VSS = 0 V at Topr = 25°C) Table 5.32 External Clock Input (XOUT, XCIN) Symbol tc(XOUT) tWH(XOUT) tWL(XOUT) tc(XCIN) tWH(XCIN) tWL(XCIN) Standard Min. Max.
R8C/3JC Group Table 5.34 5. Electrical Characteristics Serial Interface Symbol tc(CK) tW(CKH) tW(CKL) td(C-Q) th(C-Q) tsu(D-C) th(C-D) Standard Min. Max. 200 − 100 − 100 − − 50 0 − 50 − 90 − Parameter CLKi input cycle time CLKi input “H” width CLKi input “L” width TXDi output delay time TXDi hold time RXDi input setup time RXDi input hold time Unit ns ns ns ns ns ns ns i = 0 to 2 VCC = 5 V tC(CK) tW(CKH) CLKi tW(CKL) th(C-Q) TXDi td(C-Q) tsu(D-C) th(C-D) RXDi i = 0 to 2 Figure 5.10 Table 5.
R8C/3JC Group Table 5.36 5. Electrical Characteristics Electrical Characteristics (3) [2.7 V ≤ Vcc < 4.2 V] Symbol VOH Parameter Output “H” voltage Condition Max. Drive capacity High IOH = −5 mA VCC − 0.5 − VCC V IOH = −1 mA VCC − 0.5 − VCC V 1.0 − VCC V Drive capacity High IOL = 5 mA − − 0.5 V Drive capacity Low IOL = 1 mA − − 0.5 V IOL = 200 µA − − 0.5 V VCC = 3.
R8C/3JC Group Table 5.37 Symbol ICC 5. Electrical Characteristics Electrical Characteristics (4) [2.7 V ≤ Vcc < 3.3 V] (Topr = −20 to 85°C (N version), unless otherwise specified.) Parameter Condition Power supply current High-speed (VCC = 2.7 to 3.3 V) clock mode Single-chip mode, output pins are open, other pins are VSS High-speed on-chip oscillator mode Low-speed on-chip oscillator mode Low-speed clock mode Wait mode Stop mode REJ03B0302-0100 Rev.1.
R8C/3JC Group 5. Electrical Characteristics Timing Requirements (Unless Otherwise Specified: VCC = 3 V, VSS = 0 V at Topr = 25°C) Table 5.38 External Clock Input (XOUT, XCIN) Symbol Standard Parameter Min. Max.
R8C/3JC Group Table 5.40 5. Electrical Characteristics Serial Interface Symbol Standard Parameter Min. Max.
R8C/3JC Group Table 5.42 5. Electrical Characteristics Electrical Characteristics (5) [1.8 V ≤ Vcc < 2.7 V] Symbol VOH Parameter Output “H” voltage Condition Max. Drive capacity High IOH = −2 mA VCC − 0.5 − VCC V IOH = −1 mA VCC − 0.5 − VCC V 1.0 − VCC V Drive capacity High IOL = 2 mA − − 0.5 V IOL = 1 mA − − 0.5 V IOL = 200 µA − − 0.
R8C/3JC Group Table 5.43 Symbol ICC 5. Electrical Characteristics Electrical Characteristics (6) [1.8 V ≤ Vcc < 2.7 V] (Topr = −20 to 85°C (N version), unless otherwise specified.) Parameter Condition Power supply current High-speed XIN = 5 MHz (square wave) (VCC = 1.8 to 2.
R8C/3JC Group 5. Electrical Characteristics Timing Requirements (Unless Otherwise Specified: VCC = 2.2 V, VSS = 0 V at Topr = 25°C) Table 5.44 External Clock Input (XOUT, XCIN) Symbol Standard Parameter Min. Max.
R8C/3JC Group Table 5.46 5. Electrical Characteristics Serial Interface Symbol Standard Parameter Min. Max. Unit tc(CK) CLKi input cycle time 800 − ns tW(CKH) CLKi input “H” width 400 − ns tW(CKL) CLKi input “L” width 400 − ns td(C-Q) TXDi output delay time − 200 ns th(C-Q) TXDi hold time 0 − ns tsu(D-C) RXDi input setup time 150 − ns th(C-D) RXDi input hold time 90 − ns i = 0 to 2 VCC = 2.
R8C/3JC Group Package Dimensions Diagrams showing the latest package dimensions and mounting information are available in the “Packages” section of the Renesas Electronics website. JEITA Package Code P-HWQFN36-6x6-0.50 RENESAS Code PWQN0036KA-B Previous Code 36PJW-B MASS[Typ.] 0.07g *1 D 27 19 28 27 19 18 28 18 E1 *2 E D2 Lp 10 36 10 9 1 36 9 1 e bp x Reference Symbol F A1 Detail F REJ03B0302-0100 Rev.1.00 May 25, 2010 A A2 S y S NOTE) 1.
REVISION HISTORY Rev. Date 0.01 1.00 Oct. 30, 2009 May 25, 2010 Page — — 3 4 14 27 to 53 54 R8C/3JC Group User’s Manual: Hardware Description Summary First Edition issued “Preliminary” and “Under development” deleted Table 1.2 Operating Ambient Temperature: D version deleted, Note 1 deleted Table 1.3 D version deleted, (D) deleted Figure 1.1 D deleted Figure 3.1 D version deleted “5.
General Precautions in the Handling of MPU/MCU Products The following usage notes are applicable to all MPU/MCU products from Renesas. For detailed usage notes on the products covered by this manual, refer to the relevant sections of the manual. If the descriptions under General Precautions in the Handling of MPU/MCU Products and in the body of the manual differ from each other, the description in the body of the manual takes precedence. 1.
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