Datasheet
R01DS0190EJ0100 Rev.1.00 Page 70 of 107
Jun 19, 2013
RX111 Group 5. Electrical Characteristics
5.3.2 Reset Timing
Note 1. When OFS1.(STUPLVD1REN, FASTSTUP) = 11b.
Note 2. When OFS1.(STUPLVD1REN, FASTSTUP) ≠ 11b.
Note 3. When IWDTCR.CKS[3:0] = 0000b.
Figure 5.26 Reset Input Timing at Power-On
Figure 5.27 Reset Input Timing (1)
Table 5.23 Reset Timing
Conditions: VCC = AVCC0 = VCC_USB = 1.8 to 3.6 V, VSS = AVSS0 = VREFL0 = VSS_USB = 0 V, T
a
= –40 to +105°C
Item Symbol Min. Typ. Max. Unit Test
Conditions
RES# pulse width At power-on
t
RESWP
3——ms
Figure 5.26
Other than above
t
RESW
30 — — μs
Figure 5.27
Wait time after RES#
cancellation
(at power-on)
At normal startup*
1
t
RESWT
—8.5—ms
Figure 5.26
During fast startup time*
2
t
RESWT
—560— μs
Wait time after RES# cancellation
(during powered-on state)
t
RESWT
—114— μs
Figure 5.27
Independent watchdog timer reset period
t
RESWIW
—1—IWDT
clock
cycle
Figure 5.28
Software reset period
t
RESWSW
—1—ICLK
cycle
Wait time after independent watchdog timer reset cancellation*
3
t
RESW2
—300— μs
Wait time after software reset cancellation
t
RESW2
—168— μs
VCC
RES#
t
RESWP
Internal reset
t
RESWT
RES#
Internal reset
t
RESWT
t
RESW










