Datasheet

R01DS0190EJ0100 Rev.1.00 Page 10 of 107
Jun 19, 2013
RX111 Group 1. Overview
1.4 Pin Functions
Table 1.4 lists the pin functions.
Table 1.4 Pin Functions (1/3)
Classifications Pin Name I/O Description
Power supply VCC Input Power supply pin. Connect it to the system power supply.
VCL Connect this pin to the VSS pin via the 4.7 μF smoothing capacitor used to
stabilize the internal power supply. Place the capacitor close to the pin.
VSS Input Ground pin. Connect it to the system power supply (0 V).
Clock XTAL Output/
Input *
1
Pins for connecting a crystal. An external clock can be input through the
XTAL pin.
EXTAL Input
XCIN Input Input/output pins for the sub-clock oscillator. Connect a crystal between
XCIN and XCOUT.
XCOUT Output
CLKOUT Output
Clock output pin
Operating mode
control
MD Input Pin for setting the operating mode. The signal levels on this pin must not be
changed during operation.
UB# Input Pin used for USB interface mode of boot mode.
UPSEL Input Pin used for USB interface mode of boot mode.
System control RES# Input Reset pin. This MCU enters the reset state when this signal goes low.
CAC CACREF Input Input pin for the clock frequency accuracy measurement circuit.
On-chip
emulator
FINED I/O FINE interface pin.
LVD CMPA2 Input Detection target voltage pin for voltage detection 2
Interrupts NMI Input Non-maskable interrupt request pin.
IRQ0 to IRQ7 Input Interrupt request pins.
Multi-function
timer pulse unit 2
MTIOC0A, MTIOC0B
MTIOC0C, MTIOC0D
I/O The TGRA0 to TGRD0 input capture input/output compare output/PWM
output pins.
MTIOC1A, MTIOC1B I/O The TGRA1 and TGRB1 input capture input/output compare output/PWM
output pins.
MTIOC2A, MTIOC2B I/O The TGRA2 and TGRB2 input capture input/output compare output/PWM
output pins.
MTIOC3A, MTIOC3B
MTIOC3C, MTIOC3D
I/O The TGRA3 to TGRD3 input capture input/output compare output/PWM
output pins.
MTIOC4A, MTIOC4B
MTIOC4C, MTIOC4D
I/O The TGRA4 to TGRD4 input capture input/output compare output/PWM
output pins.
MTIC5U, MTIC5V, MTIC5W Input The TGRU5, TGRV5, and TGRW5 input capture input/external pulse input
pins.
MTCLKA, MTCLKB,
MTCLKC, MTCLKD
Input Input pins for the external clock.
Port output
enable 2
POE0# to POE3#, POE8# Input Input pins for request signals to place the MTU pins in the high impedance
state.
Realtime clock RTCOUT Output Output pin for the 1-Hz/64-Hz clock.
Serial
communications
interface (SCIe)
Asynchronous mode/clock synchronous mode
SCK1, SCK5 I/O Input/output pins for the clock.
RXD1, RXD5 Input Input pins for received data.
TXD1, TXD5 Output Output pins for transmitted data.
CTS1#, CTS5# Input Input pins for controlling the start of transmission and reception.
RTS1#, RTS5# Output Output pins for controlling the start of transmission and reception.