Datasheet

R01DS0190EJ0100 Rev.1.00 Page 74 of 107
Jun 19, 2013
RX111 Group 5. Electrical Characteristics
Note 1. Oscillators continue oscillating in deep sleep mode.
Note 2. When the frequency of the system clock is 32 MHz.
Note 3. When the frequency of the system clock is 12 MHz.
Note 4. When the frequency of the system clock is 32.768 kHz.
Figure 5.30 Deep Sleep Mode Cancellation Timing
Note: • When PCLKB, PCLKD, and FCLK are set to the same frequency division ratio as ICLK.
Table 5.27 Timing of Recovery from Low Power Consumption Modes (4)
Conditions: VCC = AVCC0 = VCC_USB = 1.8 to 3.6 V, VSS = AVSS0 = VREFL0 = VSS_USB = 0 V, T
a
= –40 to +105°C
Item Symbol Min. Typ. Max. Unit Test Conditions
Recovery time from deep
sleep mode*
1
High-speed mode*
2
t
DSLP
—23.5μs
Middle-speed mode*
3
t
DSLP
—3 4μs
Low-speed mode*
4
t
DSLP
— 400 500 μs
Table 5.28 Timing of Recovery from Low Power Consumption Modes (5)
Operating Mode Transition Time
Conditions: VCC = AVCC0 = VCC_USB = 1.8 to 3.6 V, VSS = AVSS0 = VREFL0 = VSS_USB = 0 V, T
a
= -40 to +105°C
Mode before Transition Mode after Transition ICLK Frequency
Transition Time
Unit
Min. Typ. Max.
High-speed operating mode Middle-speed operating mode
8 MHz — 10 — μs
Middle-speed operating mode High-speed operating mode
8 MHz — 37.5 — μs
Low-speed operating mode Middle-speed operating mode,
high-speed operating mode
32.768 kHz — 213.62 — μs
Middle-speed operating mode,
high-speed operating mode
Low-speed operating mode
32.768 kHz — 183.11 — μs
Oscillator
ICLK
IRQ
Deep sleep mode
t
DSLP