User guide

SmartBook for Renesas R8C/Tiny Microcontrollers

www.MightyMicons.com

A0 and A1 for manipulating address generation. These

registers are meant for different kinds of addressing. They

can also be used for data transfers and arithmetic/logic

operations. Then there are 16-bit Base Registers, Frame

Base Register (FB) and Static Base Register (SB) used

for relative addressing.

Of all these registers, data registers, R0-R3, address registers,

A0 and A1 and frame base register, FB form a bank of registers.

There is another bank of same registers that keeps copy of above

mentioned registers to speed up data transfer tasks during various operations.

Any one of these two register banks is always selected as per the content of the

flag bit, B.

There is a facility to configure the selected data registers and address registers

for different data formats. Data registers R0 and R1 can be used as 16 bit registers

and be divided into two 8-bit registers. For an example, R0 as a whole can be

used as a 16-bit register and when it is configured for the 8-bit data, it is divided

into two 8 bit registers like R0L and R0H. Then, R2 and R0 can be combined to

form a 32-bit register R2R0. Similarly, another 32 bit register can be formed using

R3 and R1. Like wise, address registers A1 and A0 can be combined to form a 32

bit register A1A0.

The Static Base (SB) Register and Frame Base (FB) Register are used for indexed

addressing. FB is especially useful in creating stack frames when programming

in C.

Two stack pointers, User Stack Pointer (USP) and Interrupt Stack Pointer (ISP)

combine to minimize RAM usage when the CPU is performing multiple tasks.

Apart from all this, the CPU contains a Flag Register, Program Counter and Interrupt

Table Pointer, INTB. This INTB allows you to position the beginning of the variable

vector table anywhere in the valid memory space.

The Flag Register (FLG) is a 16-bit register containing status of 11 flags indicating

various CPU operations:

Data registers,

R0-R3, address regis-

ters, A0 and A1 and

frame base register,

FB form a bank of

registers. Any one of these two reg-

ister banks is always selected

as per the content of the

flag bit, B.