User guide

7
SmartBook for Renesas R8C/Tiny Microcontrollers
www.MightyMicons.com
Carry (C) Flag: This flag retains a carry, borrow or shift out bit that has occurred
in the arithmetic/logic operations.
Debug (D) Flag: This D flag is used extensively for debugging purpose. During
normal use, it must be set with 0.
Zero (Z) Flag: This flag is set to 1 when an arithmetic operation resulted in
0.Otherwise, it is 0.
Sign (S) Flag: This flag is set to 1 when an arithmetic operation resulting in a
negative value. Otherwise, it is 0.
Register Bank Select (B) Flag: Register bank 0 is selected when this flag is 0.
Register bank 1 is selected when this flag is set to 1.
Overflow (0) Flag: This flag is set to 1 when the operation is resulted in an
overflow. Otherwise, it is 0.
Interrupt Enable (I) Flag: This flag enables a maskable interrupt. Maskable
interrupts are disabled when the I flag is 0 and are enabled when I flag is set to 1.
The I flag is cleared to 0 when the interrupt request is accepted.
Stack Pointer Select (U) Flag: ISP is selected when U flag is 0. USP is selected
when the U is set to 1. The U flag is cleared to 0 when a hardware interrupt
request is accepted or an INT instruction for software interrupt nos 1 to 31 is
executed.
Processor Interrupt Priority level (IPL): IPL is
configured with three bits to specify up to 8
processor priority levels from 0 to 7. If a
requested interrupt has priority greater than
IPL, then the interrupt is enabled.
Program counter (PC): This is a 20-bit
register indicating the address of the next
instruction that is to be executed.
D
a
t
a
4
D
e
s
i
g
n
This 20-bit INTB
register contains the address
of an interrupt vector table. This
interrupt
vector table can
be relocated to any
other place by
defining this INTB.