User guide

44
SmartBook for Renesas R8C/Tiny Microcontrollers
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initiated. These interrupts also belong to the
hardware group. A few of the controller’s
instructions like Undefined Instruction (UND),
Overflow (INTO), BRK and INT generate non-
maskable interrupts.
For your information, maskable interrupts are the kind
which can be activated or disabled by configuring an
Interrupt enable flag (I flag). Also, the priority levels for
these interrupts can be modified as per the requirement.
Non-maskable interrupts cannot be controlled by initialization.
Under the proper conditions, they are bound to happen for sure.
Each of these interrupts is associated with a four byte long Interrupt Vector.
This vector contains starting address of the service routine meant for that particular
interrupt. The structure of this vector is mentioned below:
These interrupt vectors are arranged in tables. The vectors for most of the non-
maskable interrupts contain fixed and predefined addresses and they are
collectively called as the Fixed Vector Table with the starting address ranging
from 0FFDCH to 0FFFFH. The other table for the interrupt vectors, known as
Relocatable Vector Table meant for the micon peripheral functions and the software
interrupts. The size of this relocatable table is 256 bytes accommodating 64
interrupts with the starting address defined in the INTB register. This vector table
can be created and moved to any memory area as and when it is required by
initializing the INTB register with the table address.
5.2 Software Interrupts:
Software interrupts which are non-maskable kind are activated when certain
instructions are executed.
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Each of these interrupts is
associated with a four byte
long Interrupt Vector. This
vector contains starting
address of the service
routine meant for that
particular interrupt.The vectors for most
of the non-maskable interrupts contain
fixed and predefined addresses and
they are collectively called as the
Fixed Vector Table with the
starting address ranging
from 0FFDCH to
0FFFFH.