User guide

SmartBook for Renesas R8C/Tiny Microcontrollers

www.MightyMicons.com

5.2.1 Undefined Instruction Interrupt.

The micon generates an interrupt when executing the UND, undefined instruction,

with the opcode of FFH, along the program flow. As you know, the un-programmed

memory space of the R8C/Tiny controllers contains only FFH. Therefore, using

this interrupt, a software protecting mechanism can be embedded into the

applications to sense the unwanted control flow and subsequently do the needful

correcting actions.

5.2.2 Overflow Interrupt.

If the previous arithmetic operation produced an overflow, the controller might

generate an interrupt when executing this INTO instruction. Otherwise, the

controller proceeds to execute the next immediate instruction. In other words,

the controller creates an interrupt when the arithmetic operation results with an

overflow. In general, overflow results indicate uncertain and doubtful operations.

Good programming practices always look for overflow generation in all the

computations.

So, the integrity of any calculation can be monitored by incorporating this INTO

instruction in the computing algorithm.

5.2.3 Break Interrupt.

The controller generates this interrupt when executing BRK instruction. It is not

useful for the designers. Most of the time, this interrupt is used for the debugging

purposes.

5.2.4 Instruction Interrupt.

This instruction, INT, generates 64 non-maskable

software interrupts. The instruction contains

interrupt number also. These interrupts are

assigned a number between 0 to 63. Of these

interrupts, interrupts 4 to 31 are assigned

to the micon’s peripheral functions.

Because of this, the interrupts meant for

the peripheral functions are also managed

by this INT. But, it is not advisable to

use these INT interrupts (4 to 31) for the

peripheral functions.

Relocatable

Vector Table is 256

bytes accommodating 64

interrupts with the starting

address defined in the INTB

created and moved

to any memory area

as and when it is

required by initializing

the INTB register with

the table address.