User guide

61
SmartBook for Renesas R8C/Tiny Microcontrollers
www.MightyMicons.com
6.4.1 IIC Bus Interface.
• Selectable master or slave modes.
• Continuous transmit or receive operation.
• Start and stop bits are automatically generated when defined as master.
• Bit synchronization/wait function.
• N-channel open drain output for direct drive of SCL and SDA pins.
• Overrun error detection.
• Up to 6 sources of interrupt requests: Slave – Address – Match, transmit-end,
receive data full, arbitration lost, etc…
6.4.2 SSU Bus interface.
• Can be defined as the SPI interface bus.
• Configurable as clock synchronous or 4 wire bus interface.
• Maximum transmission rate of 10MHz.
• Error detection facilities: Overrun and multi master detection.
• 5 sources of interrupts: Transmit end, transmit data empty, receive data full,
overrun and conflict.
• Other selectable functions: Data transfer direction, clock polarity and clock
phase.
This additional serial interface acts either as an IIC bus
or as a SPI bus.
D
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

 IIC Bus:
Selectable master or
slave modes. Continuous
transmit or receive operation.
Up to 6 sources of interrupt re-
quests: Slave-Address- Match, trans-
mit-end, receive data full, arbitration
lost, etc…
 
 
SSU Bus interface: Maxi-
mum transmission rate
of 10MHz. 5 sources of
interrupts: Transmit end,
transmit data empty, receive
data full, overrun and con-
flict.