User guide

66
SmartBook for Renesas R8C/Tiny Microcontrollers
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prescalar down. When the prescalar underflows, the count
value of the timer register decrements by one and at the same
time the prescalar is set automatically by the contents of the
reload register and the counting operation keeps going. When
the timing register underflows, an interrupt is generated. Then
again, both the prescalar and the timing register are reloaded
and the counting continuous.
This timer mode is available in the following timers: Timer X, Timer Y, Timer Z,
Timer RA, Timer RB, Timer RC and Timer RD
7.3 Even Counter Mode:
When configured for the event counter mode, the timers start counting the exter-
nal signals connected at the specified input pins, where as, in the timer modes,
the timers get the suitable clock signals from the internal sources.
Timer X under event counter mode, contains an 8 bit TX counter supported with
another 8 bit prescalar, PREX. These two 8 bit registers are supported with two
corresponding reload registers. These reload registers always keep the copy of
the original data that are initialized by the program for the counter operation.
When these registers underflow, the reload registers automatically load their con-
tents into corresponding timer and prescalar registers for further counting.
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When configured
for the event
counter mode,
the timers
start count-
ing the
external signals connected
at the specified input
pins.