Specifications

ManualsBrandsRenesas ManualsComputer HardwareSH7670

SH7670 Group Example of Cache Memory Setting

2.5 Allocation of Sections in the Sample Program

The cache manipulation function must be placed in a cache-disabled space.

In this sample program, an extended compiler function (the #pragma section directive) is used to place the function that

manipulates the cache control registers (io_set_cache) in a specific section (the PCACHE section) separately from the

rest of the program. Linkage editor options are then specified so that only this PCACHE section is allocated to a cache-

disabled space. That is, the rest of the program is allocated to a cache-enabled space (the P section).

Figure 4 is a memory map for the sample program.

Cache-

enabled space

Cache-

disabled space

Reserved

Internal address Section allocation

H'0000 0000

H'0400 0000

H'1000 0000

H'2400 0000

H'2C00 0000

H'FFFC 0000

H'FFFF FFFF

DVECTTBL

DINTTBL

PResetPRG

PIntPRG

C$BSEC

C$DSEC

H'0000 0000

PCACHE

RPURAM

H'FFF8 0000

H'0000 1000

CS4

CS5

CS6

H'0C00 0000

RINTTBL

H'2000 0000

H'3000 0000

H'FFF8 0000

H'FFF8 8000

H'0C00 0000

H'2000 0800

PURAM

CS0 (flash memory)

CS3 (SDRAM)

CS4

CS5

CS6

On-chip

SRAM

H'FFF8 7C00

Reserved

On-chip peripheral modules

Figure 4 Memory Map of the Sample Program

R01AN0300EJ0101 Rev. 1.01 Page 7 of 12

Oct. 15, 2010