Technical information

Section 3 Software Specifications when Using the SH72546RFCC, SH72544R, SH72543R, SH72531, and SH72531FCC

Rev. 2.00 Feb. 18, 2009 Page 37 of 94

REJ10J1938-0200

Table 3.5 Watchdog Timer Register

WTCR(W) Write Watchdog timer control register

WTCNT(W) Write Watchdog timer counter

WTCR(R) Read Watchdog timer control register

WTCNT(R) Read Watchdog timer counter

WTSR(W) Write Watchdog timer status register

WTSR(R) Read Watchdog timer status register

WRCR(W) Write Watchdog reset control register

WRCR(R) Read Watchdog reset control register

⎯ The internal I/O registers can be accessed from the [IO] window. However, note the

following when accessing the SDMR register of the bus state controller. Before accessing

the SDMR register, specify addresses to be accessed in the I/O-register definition file

(SH72546RFCC.IO, SH72544R.IO, or SH72543R.I/O) and then activate the High-

performance Embedded Workshop. After the I/O-register definition file is created, the

MCU’s specifications may be changed. If each I/O register in the I/O-register definition

file differs from addresses described in the hardware manual, change the I/O-register

definition file according to the description in the hardware manual. The I/O-register

definition file can be customized in accordance to its format. Note that, however, the

emulator does not support the bit-field function.

⎯ Verification

In the [IO] window, the input values cannot be verified.

12. Illegal Instructions

Do not execute illegal instructions with STEP-type commands.