Datasheet

Timer
Multi-function
timer
pulse unit 3
(MTU3)
• 16 bits x 8 channels
• Up to 24 pulse inputs/outputs and three pulse inputs
• Select from among six to eight counter-input clock signals for each
channel (ICLK/1, ICLK/4, ICLK/16, ICLK/64, ICLK/256, ICLK/1024,
MTCLKA, MTCLKB, MTCLKC, MTCLKD) other than channel 5, for
which only four signals are available.
• 24 output compare or input capture registers
• Counter clearing (clearing can be synchronized with compare match
or input capture)
• Simultaneous writing to multiple timer counters (TCNT) input and
output from all registers in synchronization with counter operation
• Buffered operation
• Cascade-connected operation
• 38 kinds of interrupt source
• Automatic transfer of register data
• Pulse output modes
• Toggled, PWM, complementary PWM, and reset synchronous PWM
• Complementary PWM output mode
• Outputs non-overlapping waveforms for controlling 3-phase
inverters
• Automatic specification of dead times
• PWM duty cycle: Selectable as any value from 0% to 100%
• Delay can be applied to requests for A/D conversion.
• Non-generation of interrupt requests at peak or trough values of
counters can be selected.
• Double buffering
• Reset-synchronous PWM mode
• Three PWM waveforms and corresponding inverse waveforms are
output with the desired duty cycles.
• Phase-counting mode
• Counter functionality for dead-time compensation
• Generation of triggers for A/D converters
• Differential timing for initiation of A/D conversion