Datasheet

R01DS0041EJ0150 Rev.1.50 Page 179 of 221
Oct 18, 2013
RX210 Group 5. Electrical Characteristics
Figure 5.92 RSPI Timing (Master, CPHA = 0) (Bit Rate: PCLKB Set to Division Ratio Other Than
Divided by 2) and Simple SPI Timing (Master, CKPH = 1)
Figure 5.93 RSPI Timing (Master, CPHA = 0) (Bit Rate: PCLKB Set to Divided by 2)
t
Dr,
t
Df
t
SU
t
H
t
LEAD
t
TD
t
LAG
t
SSLr,
t
SSLf
t
OH
t
OD
MSB IN DATA LSB IN MSB IN
MSB OUT DATA LSB OUT IDLE MSB OUT
SCKn
CKPOL = 0
output
SCKn
CKPOL = 1
output
SMISOn
input
SMOSIn
output
(n = 0 to 12)
Simple SPIRSPI
SSLA0 to
SSLA3
output
RSPCKA
CPOL = 0
output
RSPCKA
CPOL = 1
output
MISOA
input
MOSIA
output
SSLA0 to
SSLA3
output
RSPCKA
CPOL = 0
output
RSPCKA
CPOL = 1
output
MISOA
input
MOSIA
output
LSB IN
t
Dr,
t
Df
t
SU
t
HF
t
LEAD
t
TD
t
LAG
t
SSLr,
t
SSLf
t
OH
t
OD
MSB IN
MSB OUT DATA LSB OUT IDLE MSB OUT
MSB IN
DATA
t
HF