Operating instructions

16
The output of the Modulation VCO is connected back to the PLL for phase detection via
signal path MOD_VCO_OUT.
The phase detector output is also buffered and attenuated for the analogue input of the
CPU. This is the function of U600, R622, and R625. In this way the CPU can monitor
the VCO bias to ensure that it is within specification (>0.5V, and < 4.5V).
The FoLD pin, of U602, can be used for many purposes. It can be connected to the
output of any of the 4 internal dividers, or be used as a LOCK-DETECT monitor, or as
a user programmable output pin. In this circuit it is used as a LOCK-DETECT output
when the frequency is being changed, but otherwise it is connected internally to the
unused reference divider of U602, to deliver a 400Hz pulse train to FoLD.
U602 is set up with a phase detector frequency of 20kHz.
5.6.2 The Channel PLL
U604 and the Channel VCO (see Sheet 7) form the Channel PLL. U604 acts as its own
crystal oscillator for its reference oscillator. X601 is a 5ppm, 12MHz, crystal. Its
resonant point is adjusted by the bias applied to varactor D601.
The bias applied to varactor D601 is adjusted by the CHAN_ADJ DAC output.
The Phase detector output of U604 is then passed through the loop filter network
defined by C622, R620, C626, R619, C623, and C725 (see Sheet 7). L718 is used to
filter out any residual noise (outside of the audio bandwidth), including the phase
detector frequency, and/or any switch-mode noise from the dc voltage rails.
The loop filter signal is then fed as a control voltage to the Channel VCO
(CHAN_PLL_IN).
The output of the Channel VCO is connected back to the PLL for phase detection via
signal path CHAN_VCO_OUT.
The phase detector output is also buffered and attenuated for the analogue input of the
CPU. This is the function of U608, R623, and R624. In this way the CPU can monitor
the VCO bias to ensure that it is within specification (>0.5V, and < 4.5V).
The FoLD pin, of U604, can be used for many purposes. It can be connected to the
output of any of the 4 internal dividers, or be used as a LOCK-DETECT monitor, or as
a user programmable output pin. In this circuit it is used as a LOCK-DETECT output
when the frequency is being changed, but otherwise it is connected internally to the
unused reference divider of U604, to deliver a 400Hz pulse train to FoLD.
U604 is set up with a phase detector frequency of 31.25kHz.
The signal CHAN_VCO_EN is an output from the CPU that is used to turn on (when
High) or turn off (when low) the Channel VCO.
5.6.3 The External Reference Divider
The external Reference Input (EXT_REF_IN) is buffered by an attenuator network
formed by R628,R633, and R630 in parallel with R635. This also forms a 50 ohm
termination network for the reference input.
R628 is a 1 watt resistor, and so, in theory levels as high as +30dBm can be accepted.
To be safe, though, the largest signal that is approved to be accepted is +26dBm.
Q600 is set up as a switching transistor, and with a sufficiently high input signal level (>
+5dBm), it will clock U605.
U605 is set up as a divide by 128 circuit, and its output is then divided by U606 by 25.