Data Sheet

7 Logic Analyzer RIGOL
MSO4000D/S4000 User’s Guide
7-5
To Use the Digital Bus
Users can display the three groups of channels (D7-D0, D15-D8 and D15-D0) as
buses (BUS1 and BUS2). The value of each bus will be displayed at the bottom of the
screen in data or graph mode.
Press Bus to enter the digital bus setting menu.
 Press Bus to select BUS1 or BUS2.
 Press BusStatus to turn the digital bus on or off.
 Press Sel CH to select the corresponding channel group of the digital bus (BUS1
or BUS2) and D7-D0, D15-D8 and D15-D0 can be selected.
 Press Endian to set the endain of the bus. You can select LSB (D0 is located at
the high bit) or MSB (D15 is located at the high bit), and the default is LSB.
 Press RefClock to select any channel of D0-D15 or CH1-Ch4 as the clock
channel of the bus. When “None” is selected, the clock channel is not set.
 Press Slope to set the sample slope type of the reference clock and you can
select
(the rising edge) or (the falling edge).
 Press Type to set the display type of the digital bus and you can select “Graph”
or “Data”. In the data type, the bus value is displayed directly; in the graph type,
you can view the variation trend of the bus.
 Press Format to select the display format of the bus and you can select Hex,
Decimal, Binary or ASCII.
 Press JitterReject to turn the jitter reject function on or off. When the
reference clock is not selected for the bus, the transition state of each channel
will be lead to changes of the bus data and instable data may occur on the bus
when the channel changes. When jitter reject is enabled, the bus will not display
the data of which the hold time is less than the jitter time and retain the
previous valid data set.
 Press JitterTime and use LA_ or the navigation knob to set the jitter time
and the range available is from 1 ns to 1 ms.