Product Application

Rev.1.1

Parameters for 4.3” CTP display with FT801 chip:

case CTP35:

DemoTime=&DemoTime_CTP43;

/*4.3" CTP */

FT_DispWidth = 480;

FT_DispHeight = 272;

FT_DispHCycle = 548;

FT_DispHOffset = 43;

FT_DispHSync0 = 0;

FT_DispHSync1 = 41;

FT_DispVCycle = 292;

FT_DispVOffset = 12;

FT_DispVSync0 = 0;

FT_DispVSync1 = 10;

FT_DispPCLK = 5;

FT_DispSwizzle = 0;

FT_DispPCLKPol = 1;

break;

/*Set requested registers*/

Ft_Gpu_Hal_Wr16(phost, REG_HCYCLE, FT_DispHCycle);

Ft_Gpu_Hal_Wr16(phost, REG_HOFFSET, FT_DispHOffset);

Ft_Gpu_Hal_Wr16(phost, REG_HSYNC0, FT_DispHSync0);

Ft_Gpu_Hal_Wr16(phost, REG_HSYNC1, FT_DispHSync1);

Ft_Gpu_Hal_Wr16(phost, REG_VCYCLE, FT_DispVCycle);

Ft_Gpu_Hal_Wr16(phost, REG_VOFFSET, FT_DispVOffset);

Ft_Gpu_Hal_Wr16(phost, REG_VSYNC0, FT_DispVSync0);

Ft_Gpu_Hal_Wr16(phost, REG_VSYNC1, FT_DispVSync1);

Ft_Gpu_Hal_Wr8(phost, REG_SWIZZLE, FT_DispSwizzle);

Ft_Gpu_Hal_Wr8(phost, REG_PCLK_POL, FT_DispPCLKPol);

Ft_Gpu_Hal_Wr8(phost, REG_PCLK,FT_DispPCLK);//after this display is visible on

the LCD

Ft_Gpu_Hal_Wr16(phost, REG_HSIZE, FT_DispWidth);

Ft_Gpu_Hal_Wr16(phost, REG_VSIZE, FT_DispHeight);